345 lines
7.7 KiB
C
345 lines
7.7 KiB
C
/*
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* Copyright (c) 2020 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ADC driver for the MCP3204/MCP3208 ADCs.
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*/
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#include <zephyr/drivers/adc.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/sys/util.h>
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LOG_MODULE_REGISTER(adc_mcp320x, CONFIG_ADC_LOG_LEVEL);
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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#define MCP320X_RESOLUTION 12U
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struct mcp320x_config {
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struct spi_dt_spec bus;
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uint8_t channels;
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};
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struct mcp320x_data {
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struct adc_context ctx;
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const struct device *dev;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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uint8_t channels;
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uint8_t differential;
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struct k_thread thread;
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struct k_sem sem;
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K_KERNEL_STACK_MEMBER(stack,
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CONFIG_ADC_MCP320X_ACQUISITION_THREAD_STACK_SIZE);
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};
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static int mcp320x_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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const struct mcp320x_config *config = dev->config;
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struct mcp320x_data *data = dev->data;
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if (channel_cfg->gain != ADC_GAIN_1) {
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LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain);
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return -ENOTSUP;
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}
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if (channel_cfg->reference != ADC_REF_EXTERNAL0) {
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LOG_ERR("unsupported channel reference '%d'",
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channel_cfg->reference);
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return -ENOTSUP;
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}
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if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
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LOG_ERR("unsupported acquisition_time '%d'",
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channel_cfg->acquisition_time);
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return -ENOTSUP;
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}
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if (channel_cfg->channel_id >= config->channels) {
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LOG_ERR("unsupported channel id '%d'", channel_cfg->channel_id);
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return -ENOTSUP;
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}
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WRITE_BIT(data->differential, channel_cfg->channel_id,
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channel_cfg->differential);
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return 0;
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}
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static int mcp320x_validate_buffer_size(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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const struct mcp320x_config *config = dev->config;
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uint8_t channels = 0;
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size_t needed;
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uint32_t mask;
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for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) {
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if (mask & sequence->channels) {
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channels++;
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}
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}
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needed = channels * sizeof(uint16_t);
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if (sequence->options) {
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needed *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < needed) {
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return -ENOMEM;
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}
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return 0;
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}
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static int mcp320x_start_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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const struct mcp320x_config *config = dev->config;
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struct mcp320x_data *data = dev->data;
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int err;
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if (sequence->resolution != MCP320X_RESOLUTION) {
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LOG_ERR("unsupported resolution %d", sequence->resolution);
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return -ENOTSUP;
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}
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if (find_msb_set(sequence->channels) > config->channels) {
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LOG_ERR("unsupported channels in mask: 0x%08x",
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sequence->channels);
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return -ENOTSUP;
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}
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err = mcp320x_validate_buffer_size(dev, sequence);
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if (err) {
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LOG_ERR("buffer size too small");
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return err;
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}
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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return adc_context_wait_for_completion(&data->ctx);
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}
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static int mcp320x_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct mcp320x_data *data = dev->data;
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int err;
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adc_context_lock(&data->ctx, async ? true : false, async);
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err = mcp320x_start_read(dev, sequence);
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adc_context_release(&data->ctx, err);
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return err;
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}
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static int mcp320x_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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return mcp320x_read_async(dev, sequence, NULL);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct mcp320x_data *data = CONTAINER_OF(ctx, struct mcp320x_data, ctx);
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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k_sem_give(&data->sem);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat_sampling)
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{
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struct mcp320x_data *data = CONTAINER_OF(ctx, struct mcp320x_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static int mcp320x_read_channel(const struct device *dev, uint8_t channel,
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uint16_t *result)
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{
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const struct mcp320x_config *config = dev->config;
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struct mcp320x_data *data = dev->data;
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uint8_t tx_bytes[2];
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uint8_t rx_bytes[2];
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int err;
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const struct spi_buf tx_buf[2] = {
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{
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.buf = tx_bytes,
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.len = sizeof(tx_bytes)
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},
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{
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.buf = NULL,
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.len = 1
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}
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};
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const struct spi_buf rx_buf[2] = {
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{
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.buf = NULL,
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.len = 1
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},
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{
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.buf = rx_bytes,
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.len = sizeof(rx_bytes)
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}
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};
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const struct spi_buf_set tx = {
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.buffers = tx_buf,
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.count = ARRAY_SIZE(tx_buf)
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};
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const struct spi_buf_set rx = {
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.buffers = rx_buf,
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.count = ARRAY_SIZE(rx_buf)
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};
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/*
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* Configuration bits consists of: 5 dummy bits + start bit +
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* SGL/#DIFF bit + D2 + D1 + D0 + 6 dummy bits
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*/
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tx_bytes[0] = BIT(2) | channel >> 2;
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tx_bytes[1] = channel << 6;
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if ((data->differential & BIT(channel)) == 0) {
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tx_bytes[0] |= BIT(1);
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}
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err = spi_transceive_dt(&config->bus, &tx, &rx);
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if (err) {
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return err;
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}
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*result = sys_get_be16(rx_bytes);
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*result &= BIT_MASK(MCP320X_RESOLUTION);
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return 0;
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}
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static void mcp320x_acquisition_thread(void *p1, void *p2, void *p3)
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{
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ARG_UNUSED(p2);
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ARG_UNUSED(p3);
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struct mcp320x_data *data = p1;
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uint16_t result = 0;
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uint8_t channel;
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int err;
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while (true) {
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k_sem_take(&data->sem, K_FOREVER);
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while (data->channels) {
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channel = find_lsb_set(data->channels) - 1;
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LOG_DBG("reading channel %d", channel);
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err = mcp320x_read_channel(data->dev, channel, &result);
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if (err) {
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LOG_ERR("failed to read channel %d (err %d)",
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channel, err);
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adc_context_complete(&data->ctx, err);
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break;
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}
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LOG_DBG("read channel %d, result = %d", channel,
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result);
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*data->buffer++ = result;
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WRITE_BIT(data->channels, channel, 0);
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}
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adc_context_on_sampling_done(&data->ctx, data->dev);
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}
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}
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static int mcp320x_init(const struct device *dev)
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{
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const struct mcp320x_config *config = dev->config;
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struct mcp320x_data *data = dev->data;
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data->dev = dev;
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k_sem_init(&data->sem, 0, 1);
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if (!spi_is_ready_dt(&config->bus)) {
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LOG_ERR("SPI bus is not ready");
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return -ENODEV;
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}
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k_thread_create(&data->thread, data->stack,
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K_KERNEL_STACK_SIZEOF(data->stack),
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mcp320x_acquisition_thread,
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data, NULL, NULL,
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CONFIG_ADC_MCP320X_ACQUISITION_THREAD_PRIO,
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0, K_NO_WAIT);
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api mcp320x_adc_api = {
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.channel_setup = mcp320x_channel_setup,
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.read = mcp320x_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = mcp320x_read_async,
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#endif
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};
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#define INST_DT_MCP320X(inst, t) DT_INST(inst, microchip_mcp##t)
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#define MCP320X_DEVICE(t, n, ch) \
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static struct mcp320x_data mcp##t##_data_##n = { \
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ADC_CONTEXT_INIT_TIMER(mcp##t##_data_##n, ctx), \
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ADC_CONTEXT_INIT_LOCK(mcp##t##_data_##n, ctx), \
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ADC_CONTEXT_INIT_SYNC(mcp##t##_data_##n, ctx), \
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}; \
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static const struct mcp320x_config mcp##t##_config_##n = { \
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.bus = SPI_DT_SPEC_GET(INST_DT_MCP320X(n, t), \
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SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \
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SPI_WORD_SET(8), 0), \
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.channels = ch, \
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}; \
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DEVICE_DT_DEFINE(INST_DT_MCP320X(n, t), \
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&mcp320x_init, NULL, \
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&mcp##t##_data_##n, \
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&mcp##t##_config_##n, POST_KERNEL, \
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CONFIG_ADC_INIT_PRIORITY, \
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&mcp320x_adc_api)
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/*
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* MCP3204: 4 channels
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*/
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#define MCP3204_DEVICE(n) MCP320X_DEVICE(3204, n, 4)
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/*
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* MCP3208: 8 channels
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*/
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#define MCP3208_DEVICE(n) MCP320X_DEVICE(3208, n, 8)
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#define CALL_WITH_ARG(arg, expr) expr(arg)
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#define INST_DT_MCP320X_FOREACH(t, inst_expr) \
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LISTIFY(DT_NUM_INST_STATUS_OKAY(microchip_mcp##t), \
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CALL_WITH_ARG, (;), inst_expr)
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INST_DT_MCP320X_FOREACH(3204, MCP3204_DEVICE);
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INST_DT_MCP320X_FOREACH(3208, MCP3208_DEVICE);
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