59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
/*
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*
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_CLOCK_CONTROL_STM32_LL_CLOCK_H_
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#define ZEPHYR_DRIVERS_CLOCK_CONTROL_STM32_LL_CLOCK_H_
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#include <stm32_ll_utils.h>
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#if CONFIG_CLOCK_STM32_MCO1_SRC_NOCLOCK
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#define MCO1_SOURCE LL_RCC_MCO1SOURCE_NOCLOCK
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#elif CONFIG_CLOCK_STM32_MCO1_SRC_LSE
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#define MCO1_SOURCE LL_RCC_MCO1SOURCE_LSE
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#elif CONFIG_CLOCK_STM32_MCO1_SRC_HSE
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#define MCO1_SOURCE LL_RCC_MCO1SOURCE_HSE
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#elif CONFIG_CLOCK_STM32_MCO1_SRC_HSI
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#define MCO1_SOURCE LL_RCC_MCO1SOURCE_HSI
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#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLLCLK
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#define MCO1_SOURCE LL_RCC_MCO1SOURCE_PLLCLK
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#endif
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#if CONFIG_CLOCK_STM32_MCO2_SRC_SYSCLK
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#define MCO2_SOURCE LL_RCC_MCO2SOURCE_SYSCLK
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#elif CONFIG_CLOCK_STM32_MCO2_SRC_PLLI2S
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#define MCO2_SOURCE LL_RCC_MCO2SOURCE_PLLI2S
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#elif CONFIG_CLOCK_STM32_MCO2_SRC_HSE
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#define MCO2_SOURCE LL_RCC_MCO2SOURCE_HSE
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#elif CONFIG_CLOCK_STM32_MCO2_SRC_PLLCLK
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#define MCO2_SOURCE LL_RCC_MCO2SOURCE_PLLCLK
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#endif
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/* Macros to fill up multiplication and division factors values */
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#define z_pllm(v) LL_RCC_PLLM_DIV_ ## v
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#define pllm(v) z_pllm(v)
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#define z_pllp(v) LL_RCC_PLLP_DIV_ ## v
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#define pllp(v) z_pllp(v)
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#define z_pllq(v) LL_RCC_PLLQ_DIV_ ## v
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#define pllq(v) z_pllq(v)
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#define z_pllr(v) LL_RCC_PLLR_DIV_ ## v
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#define pllr(v) z_pllr(v)
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#if defined(STM32_PLL_ENABLED)
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void config_pll_sysclock(void);
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uint32_t get_pllout_frequency(void);
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uint32_t get_pllsrc_frequency(void);
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#endif
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void config_enable_default_clocks(void);
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/* function exported to the soc power.c */
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int stm32_clock_control_init(const struct device *dev);
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#endif /* ZEPHYR_DRIVERS_CLOCK_CONTROL_STM32_LL_CLOCK_H_ */
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