zephyr/dts/arm
Stephanos Ioannidis 8a29685a25 dts: xilinx_zynqmp: Refactor dts to specify RPU and APU separately.
ZynqMP SoC embeds two separate processor types: Cortex-R for RPU and
Cortex-A for APU.

Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within one project, the RPU and APU should be considered
separate platforms.

This commit relocates the device tree nodes that are not common between
RPU and APU to a separate dtsi file (zynqmp_rpu.dtsi).

When Cortex-A53 APU support is added in the future, an additional dtsi
file (zynqmp_apu.dtsi) for specifying the APU device tree should be
added.

For more details, refer to the issue #20217.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-07 17:17:12 +01:00
..
atmel soc: atmel_sam0: Add SAME54 2019-11-06 21:18:00 -06:00
cypress dts: arm: Remove device_type = "memory" from SRAM nodes 2019-08-06 08:59:22 -04:00
microchip drivers : spi : mec1501 : XEC SPI driver 2019-10-23 19:18:32 -07:00
nordic soc: arm: nordic: adding ipc aliases for nRF53 2019-11-20 19:29:06 +01:00
nxp soc: nxp: ke1xf: rename ftm instances to pwm to match other SoCs 2020-01-06 10:03:20 -06:00
silabs dts: silabs: Define all available gpio ports for efr32mg12p 2019-11-13 12:05:48 -06:00
st arm: board: 96b_stm32_sensor_mez: enable USART3 2020-01-03 09:37:08 -06:00
ti dts: specify cpu frequency for TI CC13X2/CC26X2 2019-11-07 15:55:21 -06:00
xilinx dts: xilinx_zynqmp: Refactor dts to specify RPU and APU separately. 2020-01-07 17:17:12 +01:00
armv6-m.dtsi
armv7-m.dtsi
armv7-r.dtsi arch: arm: Fix incorrect Cortex-R device tree specification. 2019-10-11 16:27:14 +02:00
armv8-m.dtsi