229 lines
6.8 KiB
C
229 lines
6.8 KiB
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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* Copyright (c) 2020 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <ksched.h>
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#include <zephyr/arch/riscv/csr.h>
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#include <stdio.h>
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#include <pmp.h>
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#ifdef CONFIG_USERSPACE
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/*
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* Per-thread (TLS) variable indicating whether execution is in user mode.
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*/
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__thread uint8_t is_user_mode;
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#endif
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void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
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char *stack_ptr, k_thread_entry_t entry,
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void *p1, void *p2, void *p3)
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{
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extern void z_riscv_thread_start(void);
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struct __esf *stack_init;
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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const struct soc_esf soc_esf_init = {SOC_ESF_INIT};
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#endif
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/* Initial stack frame for thread */
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stack_init = (struct __esf *)Z_STACK_PTR_ALIGN(
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Z_STACK_PTR_TO_FRAME(struct __esf, stack_ptr)
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);
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/* Setup the initial stack frame */
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stack_init->a0 = (unsigned long)entry;
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stack_init->a1 = (unsigned long)p1;
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stack_init->a2 = (unsigned long)p2;
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stack_init->a3 = (unsigned long)p3;
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/*
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* Following the RISC-V architecture,
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* the MSTATUS register (used to globally enable/disable interrupt),
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* as well as the MEPC register (used to by the core to save the
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* value of the program counter at which an interrupt/exception occurs)
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* need to be saved on the stack, upon an interrupt/exception
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* and restored prior to returning from the interrupt/exception.
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* This shall allow to handle nested interrupts.
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*
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* Given that thread startup happens through the exception exit
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* path, initially set:
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* 1) MSTATUS to MSTATUS_DEF_RESTORE in the thread stack to enable
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* interrupts when the newly created thread will be scheduled;
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* 2) MEPC to the address of the z_thread_entry in the thread
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* stack.
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* Hence, when going out of an interrupt/exception/context-switch,
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* after scheduling the newly created thread:
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* 1) interrupts will be enabled, as the MSTATUS register will be
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* restored following the MSTATUS value set within the thread stack;
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* 2) the core will jump to z_thread_entry, as the program
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* counter will be restored following the MEPC value set within the
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* thread stack.
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*/
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stack_init->mstatus = MSTATUS_DEF_RESTORE;
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#if defined(CONFIG_FPU_SHARING)
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/* thread birth happens through the exception return path */
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thread->arch.exception_depth = 1;
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#elif defined(CONFIG_FPU)
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/* Unshared FP mode: enable FPU of each thread. */
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stack_init->mstatus |= MSTATUS_FS_INIT;
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#endif
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#if defined(CONFIG_USERSPACE)
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/* Clear user thread context */
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z_riscv_pmp_usermode_init(thread);
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thread->arch.priv_stack_start = 0;
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#endif /* CONFIG_USERSPACE */
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/* Assign thread entry point and mstatus.MPRV mode. */
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if (IS_ENABLED(CONFIG_USERSPACE)
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&& (thread->base.user_options & K_USER)) {
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/* User thread */
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stack_init->mepc = (unsigned long)k_thread_user_mode_enter;
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} else {
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/* Supervisor thread */
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stack_init->mepc = (unsigned long)z_thread_entry;
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#if defined(CONFIG_PMP_STACK_GUARD)
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/* Enable PMP in mstatus.MPRV mode for RISC-V machine mode
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* if thread is supervisor thread.
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*/
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stack_init->mstatus |= MSTATUS_MPRV;
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#endif /* CONFIG_PMP_STACK_GUARD */
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}
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#if defined(CONFIG_PMP_STACK_GUARD)
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/* Setup PMP regions of PMP stack guard of thread. */
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z_riscv_pmp_stackguard_prepare(thread);
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#endif /* CONFIG_PMP_STACK_GUARD */
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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stack_init->soc_context = soc_esf_init;
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#endif
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thread->callee_saved.sp = (unsigned long)stack_init;
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/* where to go when returning from z_riscv_switch() */
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thread->callee_saved.ra = (unsigned long)z_riscv_thread_start;
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/* our switch handle is the thread pointer itself */
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thread->switch_handle = thread;
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}
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#ifdef CONFIG_USERSPACE
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/*
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* User space entry function
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*
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* This function is the entry point to user mode from privileged execution.
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* The conversion is one way, and threads which transition to user mode do
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* not transition back later, unless they are doing system calls.
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*/
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FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
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void *p1, void *p2, void *p3)
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{
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unsigned long top_of_user_stack, top_of_priv_stack;
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unsigned long status;
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/* Set up privileged stack */
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#ifdef CONFIG_GEN_PRIV_STACKS
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_current->arch.priv_stack_start =
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(unsigned long)z_priv_stack_find(_current->stack_obj);
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/* remove the stack guard from the main stack */
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_current->stack_info.start -= K_THREAD_STACK_RESERVED;
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_current->stack_info.size += K_THREAD_STACK_RESERVED;
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#else
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_current->arch.priv_stack_start = (unsigned long)_current->stack_obj;
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#endif /* CONFIG_GEN_PRIV_STACKS */
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top_of_priv_stack = Z_STACK_PTR_ALIGN(_current->arch.priv_stack_start +
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K_KERNEL_STACK_RESERVED +
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CONFIG_PRIVILEGED_STACK_SIZE);
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top_of_user_stack = Z_STACK_PTR_ALIGN(
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_current->stack_info.start +
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_current->stack_info.size -
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_current->stack_info.delta);
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status = csr_read(mstatus);
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/* Set next CPU status to user mode */
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status = INSERT_FIELD(status, MSTATUS_MPP, PRV_U);
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/* Enable IRQs for user mode */
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status = INSERT_FIELD(status, MSTATUS_MPIE, 1);
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/* Disable IRQs for m-mode until the mode switch */
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status = INSERT_FIELD(status, MSTATUS_MIE, 0);
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csr_write(mstatus, status);
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csr_write(mepc, z_thread_entry);
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#ifdef CONFIG_PMP_STACK_GUARD
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/* reconfigure as the kernel mode stack will be different */
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z_riscv_pmp_stackguard_prepare(_current);
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#endif
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/* Set up Physical Memory Protection */
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z_riscv_pmp_usermode_prepare(_current);
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z_riscv_pmp_usermode_enable(_current);
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/* preserve stack pointer for next exception entry */
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arch_curr_cpu()->arch.user_exc_sp = top_of_priv_stack;
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is_user_mode = true;
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register void *a0 __asm__("a0") = user_entry;
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register void *a1 __asm__("a1") = p1;
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register void *a2 __asm__("a2") = p2;
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register void *a3 __asm__("a3") = p3;
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__asm__ volatile (
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"mv sp, %4; mret"
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:
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: "r" (a0), "r" (a1), "r" (a2), "r" (a3), "r" (top_of_user_stack)
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: "memory");
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CODE_UNREACHABLE;
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}
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#endif /* CONFIG_USERSPACE */
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#ifndef CONFIG_MULTITHREADING
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K_KERNEL_STACK_ARRAY_DECLARE(z_interrupt_stacks, CONFIG_MP_MAX_NUM_CPUS, CONFIG_ISR_STACK_SIZE);
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K_THREAD_STACK_DECLARE(z_main_stack, CONFIG_MAIN_STACK_SIZE);
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FUNC_NORETURN void z_riscv_switch_to_main_no_multithreading(k_thread_entry_t main_entry,
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void *p1, void *p2, void *p3)
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{
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void *main_stack;
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ARG_UNUSED(p1);
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ARG_UNUSED(p2);
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ARG_UNUSED(p3);
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_kernel.cpus[0].id = 0;
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_kernel.cpus[0].irq_stack = (Z_KERNEL_STACK_BUFFER(z_interrupt_stacks[0]) +
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K_KERNEL_STACK_SIZEOF(z_interrupt_stacks[0]));
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main_stack = (Z_THREAD_STACK_BUFFER(z_main_stack) +
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K_THREAD_STACK_SIZEOF(z_main_stack));
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__asm__ volatile (
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"mv sp, %0; jalr ra, %1, 0"
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:
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: "r" (main_stack), "r" (main_entry)
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: "memory");
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/* infinite loop */
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irq_lock();
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while (true) {
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}
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CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
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}
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#endif /* !CONFIG_MULTITHREADING */
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