46 lines
490 B
Plaintext
46 lines
490 B
Plaintext
/*
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* Copyright (c) 2024 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <qemu/virt-riscv.dtsi>
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/ {
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cpus {
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cpu@0 {
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riscv,isa = "rv32gc";
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};
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cpu@1 {
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riscv,isa = "rv32gc";
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};
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cpu@2 {
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riscv,isa = "rv32gc";
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};
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cpu@3 {
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riscv,isa = "rv32gc";
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};
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cpu@4 {
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riscv,isa = "rv32gc";
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};
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cpu@5 {
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riscv,isa = "rv32gc";
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};
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cpu@6 {
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riscv,isa = "rv32gc";
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};
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cpu@7 {
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riscv,isa = "rv32gc";
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};
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};
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};
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