92 lines
5.7 KiB
C
92 lines
5.7 KiB
C
/* This file is a temporary workaround for mapping of the generated information
|
|
* to the current driver definitions. This will be removed when the drivers
|
|
* are modified to handle the generated information, or the mapping of
|
|
* generated data matches the driver definitions.
|
|
*/
|
|
|
|
/* SoC level DTS fixup file */
|
|
|
|
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
|
|
|
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
|
|
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
|
|
|
|
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS
|
|
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED
|
|
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0
|
|
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
|
|
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_40010000_IRQ_1
|
|
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
|
|
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_40010000_LABEL
|
|
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_40010000_LOCATION
|
|
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_40010000_SIZE
|
|
|
|
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_40010400_BASE_ADDRESS
|
|
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_40010400_CURRENT_SPEED
|
|
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_40010400_IRQ_0
|
|
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
|
|
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_40010400_IRQ_1
|
|
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
|
|
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_40010400_LABEL
|
|
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_40010400_LOCATION
|
|
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_40010400_SIZE
|
|
|
|
#define CONFIG_USART_GECKO_2_BASE_ADDRESS SILABS_GECKO_USART_40010800_BASE_ADDRESS
|
|
#define CONFIG_USART_GECKO_2_CURRENT_SPEED SILABS_GECKO_USART_40010800_CURRENT_SPEED
|
|
#define CONFIG_USART_GECKO_2_IRQ_RX SILABS_GECKO_USART_40010800_IRQ_0
|
|
#define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_0_PRIORITY
|
|
#define CONFIG_USART_GECKO_2_IRQ_TX SILABS_GECKO_USART_40010800_IRQ_1
|
|
#define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_1_PRIORITY
|
|
#define CONFIG_USART_GECKO_2_LABEL SILABS_GECKO_USART_40010800_LABEL
|
|
#define CONFIG_USART_GECKO_2_LOCATION SILABS_GECKO_USART_40010800_LOCATION
|
|
#define CONFIG_USART_GECKO_2_SIZE SILABS_GECKO_USART_40010800_SIZE
|
|
|
|
#define CONFIG_USART_GECKO_3_BASE_ADDRESS SILABS_GECKO_USART_40010C00_BASE_ADDRESS
|
|
#define CONFIG_USART_GECKO_3_CURRENT_SPEED SILABS_GECKO_USART_40010C00_CURRENT_SPEED
|
|
#define CONFIG_USART_GECKO_3_IRQ_RX SILABS_GECKO_USART_40010C00_IRQ_0
|
|
#define CONFIG_USART_GECKO_3_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_0_PRIORITY
|
|
#define CONFIG_USART_GECKO_3_IRQ_TX SILABS_GECKO_USART_40010C00_IRQ_1
|
|
#define CONFIG_USART_GECKO_3_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_1_PRIORITY
|
|
#define CONFIG_USART_GECKO_3_LABEL SILABS_GECKO_USART_40010C00_LABEL
|
|
#define CONFIG_USART_GECKO_3_LOCATION SILABS_GECKO_USART_40010C00_LOCATION
|
|
#define CONFIG_USART_GECKO_3_SIZE SILABS_GECKO_USART_40010C00_SIZE
|
|
|
|
#define CONFIG_LEUART_GECKO_0_BASE_ADDRESS SILABS_GECKO_LEUART_4004A000_BASE_ADDRESS
|
|
#define CONFIG_LEUART_GECKO_0_CURRENT_SPEED SILABS_GECKO_LEUART_4004A000_CURRENT_SPEED
|
|
#define CONFIG_LEUART_GECKO_0_IRQ SILABS_GECKO_LEUART_4004A000_IRQ_0
|
|
#define CONFIG_LEUART_GECKO_0_IRQ_PRIORITY SILABS_GECKO_LEUART_4004A000_IRQ_0_PRIORITY
|
|
#define CONFIG_LEUART_GECKO_0_LABEL SILABS_GECKO_LEUART_4004A000_LABEL
|
|
#define CONFIG_LEUART_GECKO_0_LOCATION SILABS_GECKO_LEUART_4004A000_LOCATION
|
|
#define CONFIG_LEUART_GECKO_0_SIZE SILABS_GECKO_LEUART_4004A000_SIZE
|
|
|
|
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFR32MG_GPIO_4000A400_LABEL
|
|
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN
|
|
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
|
|
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD
|
|
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
|
|
|
|
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFR32MG_GPIO_PORT_4000A000_LABEL
|
|
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFR32MG_GPIO_PORT_4000A030_LABEL
|
|
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFR32MG_GPIO_PORT_4000A060_LABEL
|
|
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFR32MG_GPIO_PORT_4000A090_LABEL
|
|
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFR32MG_GPIO_PORT_4000A0C0_LABEL
|
|
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFR32MG_GPIO_PORT_4000A0F0_LABEL
|
|
|
|
#define CONFIG_I2C_GECKO_0_BASE_ADDRESS SILABS_GECKO_I2C_4000C000_BASE_ADDRESS
|
|
#define CONFIG_I2C_GECKO_0_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C000_CLOCK_FREQUENCY
|
|
#define CONFIG_I2C_GECKO_0_IRQ SILABS_GECKO_I2C_4000C000_IRQ_0
|
|
#define CONFIG_I2C_GECKO_0_IRQ_PRIORITY SILABS_GECKO_I2C_4000C000_IRQ_0_PRIORITY
|
|
#define CONFIG_I2C_GECKO_0_LABEL SILABS_GECKO_I2C_4000C000_LABEL
|
|
#define CONFIG_I2C_GECKO_0_LOCATION SILABS_GECKO_I2C_4000C000_LOCATION
|
|
#define CONFIG_I2C_GECKO_0_SIZE SILABS_GECKO_I2C_4000C000_SIZE
|
|
|
|
#define CONFIG_I2C_GECKO_1_BASE_ADDRESS SILABS_GECKO_I2C_4000C400_BASE_ADDRESS
|
|
#define CONFIG_I2C_GECKO_1_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C400_CLOCK_FREQUENCY
|
|
#define CONFIG_I2C_GECKO_1_IRQ SILABS_GECKO_I2C_4000C400_IRQ_0
|
|
#define CONFIG_I2C_GECKO_1_IRQ_PRIORITY SILABS_GECKO_I2C_4000C400_IRQ_0_PRIORITY
|
|
#define CONFIG_I2C_GECKO_1_LABEL SILABS_GECKO_I2C_4000C400_LABEL
|
|
#define CONFIG_I2C_GECKO_1_LOCATION SILABS_GECKO_I2C_4000C400_LOCATION
|
|
#define CONFIG_I2C_GECKO_1_SIZE SILABS_GECKO_I2C_4000C400_SIZE
|
|
|
|
/* End of SoC Level DTS fixup file */
|