zephyr/subsys/testsuite/include
Krzysztof Chruscinski ffc4a6c928 testsuite: Add busy simulator module
Busy simulator is using counter device and entropy device to
generate random cpu load. Counter device cofiguration can be
used to set cpu load interrupt priority and optional pin that
can be set during the load.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-07-29 10:59:00 -04:00
..
busy_sim.h
interrupt_util.h
tc_util.h
test_asm_inline_gcc.h
test_utils.h
timestamp.h