Dylan Hung 8b7ec919c8 soc: arm: aspeed: enable cache for AST10x0 series SOC ... Enable cache for AST10x0 series SOC in platform initialization. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>		2022-06-05 14:28:50 +02:00
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arc	ARC: boards: allow MWDT toolchain for nsim_hs6x and nsim_hs6x_smp	2022-05-10 14:12:25 -04:00
arm	soc: arm: aspeed: enable cache for AST10x0 series SOC	2022-06-05 14:28:50 +02:00
arm64	boards: imx8mm: add partial pin control support	2022-05-12 16:57:17 -05:00
mips	asm: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
nios2	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
posix	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
riscv	riscv: Rework and cleanup Kconfig	2022-06-05 14:28:42 +02:00
sparc	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
x86	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
xtensa	boards: xtensa: Activate the intel_adsp west runner	2022-06-05 14:13:57 +02:00
Kconfig	…