zephyr

History

Kumar Gala bbe222cad0 soc: arm: Unify setting of Cortex-M specifc compiler flags Moved setting of specific Cortex-M compiler flags in each SoC directory unify setting them in the arch/arm/soc Makefile. Add flags for Cortex M0, M0+, M1, M3, M4, and M7. However only CONFIG_CPU_CORTEX_M3 and CONFIG_CPU_CORTEX_M4 are supported at this time As part of this change converted Kbuild files for some SoCs into Makefiles as the Makefiles would be empty otherwise. Change-Id: Ie4e0178b141ca761ec482a610ae50e94fe58070f Signed-off-by: Kumar Gala <kumar.gala@linaro.org>		2016-05-27 10:45:48 -05:00
..
Kconfig.defconfig.mk64f12	spi: consalidate and simplify	2016-05-12 10:57:26 +00:00
Kconfig.defconfig.series	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.series	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.soc	Cleanup whitespace in Kconfig files	2016-05-25 13:28:07 -05:00
Makefile	soc: arm: Unify setting of Cortex-M specifc compiler flags	2016-05-27 10:45:48 -05:00
README.txt	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
linker.ld	build: rename non-generated linker scripts to .ld extension	2016-05-09 18:09:26 +00:00
soc.c	arm/nxp_kinetis/k6x: always inline clock init function	2016-05-03 12:43:31 +00:00
soc.h	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
soc_config.c	arm/nxp_kinetis/k6x: simplify uart init	2016-05-03 12:43:31 +00:00
wdog.S	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00

README.txt

Notes on the FSL FRDM K64F SRAM base address and size

Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform.  Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.

As such the following values are used:

CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64      # Measured in kB