zephyr/arch/arc/soc
Julien Delayen 176d184fb8 power: Add ARC core suspend and resume support
When going into DEEP_SLEEP mode, the ARC core now saves
its context. This includes:
- All core registers
- Stack pointer
- Program counter (restored by jumping to the restore code)

The arc reset code now checks if the GPS0 bit 2 is set.
This is similar to the behavior of the x86 core done by
the QMSI bootloader which is setting GPS0 bit 1 in order
to call the restore path instead of cold boot path.

The sample has been adapted in order to support the ARC.

Jira: ZEP-1222

Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-12-15 12:49:33 +00:00
..
em7d arc: Define _arc_v2_irq_unit device 2016-12-15 12:49:30 +00:00
em9d arc: Define _arc_v2_irq_unit device 2016-12-15 12:49:30 +00:00
em11d arc: Define _arc_v2_irq_unit device 2016-12-15 12:49:30 +00:00
quark_se_c1000_ss power: Add ARC core suspend and resume support 2016-12-15 12:49:33 +00:00