Mateusz Sierszulski 9beb6ab2d6 soc: riscv: telink_b91: Place .init before .vectors section ... This commit fixes placing .init sections before .vectors sections in telink_b91 SoC. Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>		2022-09-08 10:39:31 +02:00
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andes_v5	soc: riscv: ae350: Remove redundant .vectors sections	2022-09-08 10:39:31 +02:00
common	soc: riscv: remove usage of SOC_ERET	2022-08-04 13:44:48 +02:00
gd32vf103	soc: arm,riscv: gigadevice: always enable CLOCK_CONTROL	2022-09-06 09:57:25 +02:00
miv	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
mpfs	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
neorv32	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
sifive-freedom	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
starfive_jh71xx	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
telink_b91	soc: riscv: telink_b91: Place .init before .vectors section	2022-09-08 10:39:31 +02:00
virt	soc: riscv: remove unused RISCV_MTIME(CMP)_BASE and IRQ definitions	2022-08-02 09:12:31 +02:00
CMakeLists.txt	…
Kconfig	…
Kconfig.defconfig	…
Kconfig.soc	…