00b2ef8744
This commit makes the devicetrees of the targets that are based on the QEMU `virt` machine more consistent with the rest of the RISC-V targets in Zephyr by: * adding the `riscv,isa` property * adding a compatible string which uniquely identifies the `virt` core Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> |
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| .. | ||
| andes | ||
| efinix | ||
| espressif/esp32c3 | ||
| gd | ||
| ite | ||
| lowrisc | ||
| microchip | ||
| niosv | ||
| nordic | ||
| openisa | ||
| qemu | ||
| sifive | ||
| starfive | ||
| telink | ||
| neorv32.dtsi | ||
| renode_riscv32_virt.dtsi | ||
| riscv32-litex-vexriscv.dtsi | ||