135 lines
3.2 KiB
YAML
135 lines
3.2 KiB
YAML
# Copyright 2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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# Common fields for panel timings
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# inherited from Linux panel bindings.
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description: |
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Common timing settings for display panels. These timings can be added to
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a panel under display-timings node. For example:
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&lcdif {
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display-timings {
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compatible = "zephyr,panel-timing";
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hsync-len = <8>;
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hfront-porch = <32>;
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hback-porch = <32>;
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vsync-len = <2>;
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vfront-porch = <16>;
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vback-porch = <14>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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clock-frequency = <62346240>;
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};
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};
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compatible: "zephyr,panel-timing"
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properties:
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clock-frequency:
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type: int
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description: |
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Pixel clock for display controller in Hz. Must be at least as large as:
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(height + vsync-len + vfront-porch + vback-porch) *
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(width + hsync-len + hfront-porch + hback-porch) *
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desired frame rate
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hsync-len:
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type: int
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required: true
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description: |
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Horizontal synchronization pulse duration of panel driven by this
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controller, in pixels
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vsync-len:
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type: int
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required: true
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description: |
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Vertical synchronization pulse duration of panel driven by this
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controller, in lines
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hback-porch:
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type: int
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required: true
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description: |
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Horizontal back porch duration of panel driven by this controller,
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in pixels
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vback-porch:
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type: int
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required: true
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description: |
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Vertical back porch duration of panel driven by this controller, in lines
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hfront-porch:
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type: int
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required: true
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description: |
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Horizontal front porch duration of panel driven by this controller,
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in pixels
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vfront-porch:
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type: int
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required: true
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description: |
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Vertical front porch duration of panel driven by this controller, in lines
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hsync-active:
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type: int
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required: true
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enum:
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- 0
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- 1
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description: |
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Polarity of horizontal sync pulse
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0 selects active low
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1 selects active high
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vsync-active:
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type: int
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required: true
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enum:
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- 0
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- 1
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description: |
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Polarity of vertical sync pulse
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0 selects active low
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1 selects active high
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de-active:
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type: int
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required: true
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enum:
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- 0
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- 1
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description: |
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Polarity of data enable, sent with each horizontal interval.
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0 selects active low
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1 selects active high.
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pixelclk-active:
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type: int
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required: true
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enum:
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- 0
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- 1
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description: |
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Polarity of pixel clock. Selects which edge to drive data to display on.
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0 drives pixel data on falling edge, and samples on rising edge.
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1 drives pixel data on rising edge, and samples data on falling edge
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syncclk-active:
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type: int
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enum:
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- 0
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- 1
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description: |
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Drive sync on rising or sample sync on falling edge. If not specified
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then the controller uses the setup specified by pixelclk-active.
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Use 0 to drive sync on falling edge
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and sample sync on rising edge of pixel clock.
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Use 1 to drive sync on rising edge
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and sample sync on falling edge of pixel clock.
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