zephyr/dts/arm/atmel/sam4s.dtsi

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/*
* Copyright (c) 2017 Justin Watson
* Copyright (c) 2019 Gerson Fernando Budke
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
/ {
aliases {
watchdog0 = &wdt;
};
chosen {
zephyr,flash-controller = &eefc;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};
soc {
sram0: memory@20100000 {
compatible = "mmio-sram";
};
eefc: flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
reg = <0x400e0a00 0x200>;
peripheral-id = <6>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@400000 {
compatible = "soc-nv-flash";
write-block-size = <16>;
erase-block-size = <8192>;
};
};
wdt: watchdog@400e1450 {
compatible = "atmel,sam-watchdog";
reg = <0x400e1450 0xc>;
interrupts = <4 0>;
peripheral-id = <4>;
status = "disabled";
};
twi0: i2c@40018000 {
compatible = "atmel,sam-i2c-twi";
clock-frequency = <I2C_BITRATE_STANDARD>;
reg = <0x40018000 0x128>;
interrupts = <19 0>;
peripheral-id = <19>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
twi1: i2c@4001c000 {
compatible = "atmel,sam-i2c-twi";
clock-frequency = <I2C_BITRATE_STANDARD>;
reg = <0x4001c000 0x128>;
interrupts = <20 0>;
peripheral-id = <20>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi0: spi@40008000 {
compatible = "atmel,sam-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40008000 0x4000>;
interrupts = <21 0>;
peripheral-id = <21>;
status = "disabled";
};
uart0: uart@400e0600 {
compatible = "atmel,sam-uart";
reg = <0x400e0600 0x200>;
interrupts = <8 1>;
peripheral-id = <8>;
status = "disabled";
};
uart1: uart@400e0800 {
compatible = "atmel,sam-uart";
reg = <0x400e0800 0x200>;
interrupts = <9 1>;
peripheral-id = <9>;
status = "disabled";
};
usart0: usart@40024000 {
compatible = "atmel,sam-usart";
reg = <0x40024000 0x130>;
interrupts = <14 1>;
peripheral-id = <14>;
status = "disabled";
};
usart1: usart@40028000 {
compatible = "atmel,sam-usart";
reg = <0x40028000 0x130>;
interrupts = <15 1>;
peripheral-id = <15>;
status = "disabled";
};
pinctrl: pinctrl@400e0e00 {
compatible = "atmel,sam-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x400e0e00 0x400e0e00 0x600>;
status = "okay";
pioa: gpio@400e0e00 {
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <11 1>;
peripheral-id = <11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
piob: gpio@400e1000 {
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <12 1>;
peripheral-id = <12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
pioc: gpio@400e1200 {
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <13 1>;
peripheral-id = <13>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
};
tc0: tc@40010000 {
compatible = "atmel,sam-tc";
reg = <0x40010000 0x100>;
interrupts = <23 0
24 0
25 0>;
peripheral-id = <23 24 25>;
status = "disabled";
};
tc1: tc@40014000 {
compatible = "atmel,sam-tc";
reg = <0x40014000 0x100>;
interrupts = <26 0
27 0
28 0>;
peripheral-id = <26 27 28>;
status = "disabled";
};
rstc: rstc@400e1400 {
compatible = "atmel,sam-rstc";
reg = <0x400e1400 0x10>;
peripheral-id = <1>;
user-nrst;
};
smc: smc@400e0000 {
compatible = "atmel,sam-smc";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x400e0000 0x200>;
peripheral-id = <10>;
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};