280 lines
8.8 KiB
Plaintext
280 lines
8.8 KiB
Plaintext
# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config SOC_ESP32
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bool "ESP32"
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select XTENSA
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select CLOCK_CONTROL
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select CLOCK_CONTROL_ESP32
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select DYNAMIC_INTERRUPTS
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select ARCH_HAS_GDBSTUB
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select ARCH_SUPPORTS_COREDUMP
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select PINCTRL
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select XIP
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select HAS_ESPRESSIF_HAL
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if SOC_ESP32
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config IDF_TARGET_ESP32
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bool "ESP32 as target board"
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default y
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config ESPTOOLPY_FLASHFREQ_80M
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bool
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default y
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config FLASH_SIZE
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int
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default $(dt_node_reg_size_int,/soc/flash-controller@3ff42000/flash@0,0)
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config FLASH_BASE_ADDRESS
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hex
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default $(dt_node_reg_addr_hex,/soc/flash-controller@3ff42000/flash@0)
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config ESP32_BT_RESERVE_DRAM
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hex "Bluetooth controller reserved RAM region"
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default 0xdb5c if BT
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default 0
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config ESP_HEAP_MEM_POOL_REGION_1_SIZE
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int "Internal DRAM region 1 mempool size"
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default 16384
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help
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ESP32 has two banks of size 192K and 128K which can be used
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as DRAM, system heap allocates area from region 0.
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This configuration can be used to add memory from region 1
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to heap and can be allocated using k_malloc.
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config ESP_SPIRAM
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bool "Support for external, SPI-connected RAM"
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help
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This enables support for an external SPI RAM chip, connected in
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parallel with the main SPI flash chip.
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config ESP_HEAP_MIN_EXTRAM_THRESHOLD
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int "Minimum threshold for external RAM allocation"
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default 8192
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range 1024 131072
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depends on ESP_SPIRAM
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help
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Threshold to decide if memory will be allocated from DRAM
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or SPIRAM. If value of allocation size is less than this value,
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memory will be allocated from internal RAM.
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config ESP_HEAP_SEARCH_ALL_REGIONS
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bool "Search for all available heap regions"
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depends on ESP_SPIRAM
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default y
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help
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This configuration enables searching all available heap
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regions. If the region of desired capability is exhausted,
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memory will be allocated from other available region.
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menu "SPI RAM config"
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depends on ESP_SPIRAM
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choice SPIRAM_TYPE
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prompt "Type of SPI RAM chip in use"
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default SPIRAM_TYPE_ESPPSRAM16
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config SPIRAM_TYPE_ESPPSRAM16
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bool "ESP-PSRAM16 or APS1604"
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32 or IS25WP032"
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config SPIRAM_TYPE_ESPPSRAM64
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bool "ESP-PSRAM64 or LY68L6400"
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endchoice # SPIRAM_TYPE
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config ESP_SPIRAM_SIZE
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int "Size of SPIRAM part"
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default 2097152 if SPIRAM_TYPE_ESPPSRAM16
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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help
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Specify size of SPIRAM part.
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NOTE: If SPIRAM size is greater than 4MB, only
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lower 4MB can be allocated using k_malloc().
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
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1. Flash SPI running at 40MHz and RAM SPI running at 40MHz
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2. Flash SPI running at 80MHz and RAM SPI running at 40MHz
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3. Flash SPI running at 80MHz and RAM SPI running at 80MHz
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Note: If the third mode(80MHz+80MHz) is enabled for SPI RAM of type 32MBit, one of the HSPI/VSPI host
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will be occupied by the system. Which SPI host to use can be selected by the config item
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SPIRAM_OCCUPY_SPI_HOST. Application code should never touch HSPI/VSPI hardware in this case. The
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option to select 80MHz will only be visible if the flash SPI speed is also 80MHz.
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(ESPTOOLPY_FLASHFREQ_79M is true)
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config SPIRAM_SPEED_40M
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bool "40MHz clock speed"
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config SPIRAM_SPEED_80M
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depends on ESPTOOLPY_FLASHFREQ_80M
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bool "80MHz clock speed"
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endchoice # SPIRAM_SPEED
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menu "PSRAM clock and cs IO for ESP32-DOWD"
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config D0WD_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 17
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help
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The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design. If user use
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1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
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config D0WD_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 16
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help
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The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. If user use
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1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
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endmenu # PSRAM clock and cs IO for ESP32-DOWD
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menu "PSRAM clock and cs IO for ESP32-D2WD"
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config D2WD_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 9
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help
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User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
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so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
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config D2WD_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 10
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help
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User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
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so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
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endmenu # PSRAM clock and cs IO for ESP32-D2WD
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menu "PSRAM clock and cs IO for ESP32-PICO"
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config PICO_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 10
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help
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The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
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For ESP32-PICO chip, the psram share clock with flash, so user do not need to configure the clock
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IO.
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For the reference hardware design, please refer to
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https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
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endmenu # PSRAM clock and cs IO for ESP32-PICO
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config SPIRAM_CUSTOM_SPIWP_SD3_PIN
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bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
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default y if SPIRAM_SPIWP_SD3_PIN != 7 # backwards compatibility, can remove in IDF 5
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default n
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help
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This setting is only used if the SPI flash pins have been overridden by setting the eFuses
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SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.
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When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
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ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
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mode, so a WP pin setting is necessary.
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If this config item is set to N (default), the correct WP pin will be automatically used for any
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Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
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to Y and specify the GPIO number connected to the WP pin.
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When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
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configured in the bootloader.
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config SPIRAM_SPIWP_SD3_PIN
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int "Custom SPI PSRAM WP(SD3) Pin"
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range 0 33
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default 7
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help
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The option "Use custom SPI PSRAM WP(SD3) pin" must be set or this value is ignored
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If burning a customized set of SPI flash pins in eFuse and using DIO or DOUT mode for flash, set this
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value to the GPIO number of the SPIRAM WP pin.
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config SPIRAM
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bool
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default y
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endmenu # SPI RAM config
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choice ESP32_UNIVERSAL_MAC_ADDRESSES
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bool "Number of universally administered (by IEEE) MAC address"
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default ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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help
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Configure the number of universally administered (by IEEE) MAC addresses.
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During initialization, MAC addresses for each network interface are generated or
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derived from a single base MAC address. If the number of universal MAC addresses is four,
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all four interfaces (WiFi station, WiFi softap, Bluetooth and Ethernet) receive a universally
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administered MAC address. These are generated sequentially by adding 0, 1, 2 and 3 (respectively)
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to the final octet of the base MAC address. If the number of universal MAC addresses is two,
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only two interfaces (WiFi station and Bluetooth) receive a universally administered MAC address.
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These are generated sequentially by adding 0 and 1 (respectively) to the base MAC address.
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The remaining two interfaces (WiFi softap and Ethernet) receive local MAC addresses.
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These are derived from the universal WiFi station and Bluetooth MAC addresses, respectively.
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When using the default (Espressif-assigned) base MAC address, either setting can be used.
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When using a custom universal MAC address range, the correct setting will depend on the
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allocation of MAC addresses in this range (either 2 or 4 per device.)
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config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
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bool "Two"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_BT
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config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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bool "Four"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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select ESP_MAC_ADDR_UNIVERSE_BT
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select ESP_MAC_ADDR_UNIVERSE_ETH
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endchoice # ESP32_UNIVERSAL_MAC_ADDRESSES
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config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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bool
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config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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bool
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config ESP_MAC_ADDR_UNIVERSE_BT
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bool
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config ESP_MAC_ADDR_UNIVERSE_ETH
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bool
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config ESP32_UNIVERSAL_MAC_ADDRESSES
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int
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default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
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default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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config ESP32_PHY_MAX_WIFI_TX_POWER
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int "Max WiFi/BLE TX power (dBm)"
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range 10 20
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default 20
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help
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Set maximum transmit power for WiFi radio. Actual transmit power for high
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data rates may be lower than this setting.
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config ESP32_PHY_MAX_TX_POWER
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int
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default ESP32_PHY_MAX_WIFI_TX_POWER
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endif # SOC_ESP32
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