117 lines
4.1 KiB
YAML
117 lines
4.1 KiB
YAML
# Copyright (c) 2020 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32F1 Pin controller Node
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Based on pincfg-node.yaml binding.
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Note: `bias-disable` and `drive-push-pull` are default pin configurations.
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They will be applied in case no `bias-foo` or `driver-bar` properties
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are set.
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compatible: "st,stm32f1-pinctrl"
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include:
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- name: base.yaml
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- name: pincfg-node.yaml
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child-binding:
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property-allowlist:
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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- drive-push-pull
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- drive-open-drain
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- output-low
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- output-high
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properties:
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reg:
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required: true
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swj-cfg:
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type: string
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required: false
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default: "full" # reset state
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enum:
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- "full"
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- "no-njtrst"
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- "jtag-disable"
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- "disable"
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description: |
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Configures number of pins assigned to the SWJ debug port.
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* full - Full SWJ (JTAG-DP + SW-DP).
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* no-njtrst - Full SWJ (JTAG-DP + SW-DP) but without NJTRST.
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Releases: PB4.
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* jtag-disable - JTAG-DP Disabled and SW-DP Enabled.
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Releases: PA15 PB3 PB4.
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* disable - JTAG-DP Disabled and SW-DP Disabled.
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Releases: PA13 PA14 PA15 PB3 PB4.
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If absent, then Full SWJ (JTAG-DP + SW-DP) is used (reset state).
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child-binding:
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description: |
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This binding gives a base representation of the STM32F1 pins
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configration
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properties:
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pinmux:
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required: true
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type: int
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description: |
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Adapted from https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
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Integer array, represents gpio pin number and mux setting.
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These defines are calculated as: ((port * 16 + line) << 8) | (function << 6) | remap)
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With:
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- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
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- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
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- function: The configuration mode, can be:
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* 0 : Alternate function output
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* 1 : Input
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* 2 : Analog
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* 3 : GPIO output
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In case selected pin function is GPIO output, pin is statically configured as
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a plain output GPIO, which configuration can be set by adding 'ouptut-low' or
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'output-high' properties to the pinctrl configuration. Default is output-low.
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- remap: The pin remapping configuration. It allows to assign the pin
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function to a different peripheral. Remain configuration can be:
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* 0 : No remap
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* 1 : Partial remap 1
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* 2 : Partial remap 2
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* 3 : Partial remap 3
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* 4 : Full remap
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To simplify the usage, macro is available to generate "pinmux" field.
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This macro is available here:
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-include/zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h
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Some examples of macro usage:
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GPIO A9 set as alernate with no remap
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... {
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pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_NO)>;
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};
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GPIO A9 set as alernate with full remap
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... {
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pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_FULL)>;
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};
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GPIO A9 set as input
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... {
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pinmux = <STM32F1_PINMUX('A', 9, GPIO_IN, REMAP_NO)>;
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};
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GPIO A9 set as output-high
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... {
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pinmux = <STM32F1_PINMUX('A', 9, GPIO_OUT, REMAP_NO)>;
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output-high;
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};
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slew-rate:
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required: false
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type: string
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default: "max-speed-10mhz"
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enum:
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- "max-speed-10mhz" # Default
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- "max-speed-2mhz"
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- "max-speed-50mhz"
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description: |
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Pin output mode, maximum achievable speed. Only applies to
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output mode (alternate).
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