122 lines
3.8 KiB
YAML
122 lines
3.8 KiB
YAML
# Copyright (c) 2020 Linaro Limited
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# Copyright (c) 2021 Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Microchip XEC Pin controller Node
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Based on pincfg-node.yaml binding.
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The MCHP XEC pin controller is a singleton node responsible for controlling
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pin function selection and pin properties. For example, you can use this
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node to select peripheral pin functions.
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The node has the 'pinctrl' node label set in your SoC's devicetree,
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so you can modify it like this:
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&pinctrl {
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/* your modifications go here */
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};
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All device pin configurations should be placed in child nodes of the
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'pinctrl' node, as in the spi0 example shown at the end:
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A group can also specify shared pin properties common to all the specified
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pins, such as the 'bias-pull-up' property in group 2. Here is a list of
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supported standard pin properties:
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- bias-disable: Disable pull-up/down (default behavior, not required).
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- bias-pull-down: Enable pull-down resistor.
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- bias-pull-up: Enable pull-up resistor.
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- drive-push-pull: Output driver is push-pull (default, not required).
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- drive-open-drain: Output driver is open-drain.
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- output-high: Set output state high when pin configured.
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- output-low: Set output state low when pin configured.
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Custom pin properties for drive strength and slew rate are available:
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- drive-strength
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- slew-rate
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Driver strength and slew rate hardware defaults vary by SoC and pin.
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An example for MEC172x family, include the chip level pinctrl
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DTSI file in the board level DTS:
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#include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
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We want to use the shared SPI port of the MEC172x QMSPI controller
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and want the chip select 0 to be open-drain.
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To change a pin's pinctrl default properties add a reference to the
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pin in the board's DTS file and set the properties.
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&spi0 {
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pinctrl-0 = < &shd_cs0_n_gpio055
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&shd_clk_gpio056
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&shd_io0_gpio223
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&shd_io1_gpio224
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&shd_io3_gpio016 >;
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pinctrl-names = "default";
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}
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&shd_cs0_n_gpio055 {
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drive-open-drain;
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};
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compatible: "microchip,xec-pinctrl"
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include:
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- name: base.yaml
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- name: pincfg-node.yaml
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child-binding:
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property-allowlist:
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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- drive-push-pull
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- drive-open-drain
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- low-power-enable
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- output-high
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- output-low
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properties:
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reg:
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required: true
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child-binding:
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description: |
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This binding gives a base representation of the Microchip XEC pins
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configuration
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properties:
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pinmux:
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type: int
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required: true
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description: Pinmux selection
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slew-rate:
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required: false
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type: string
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default: "low-speed"
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enum:
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- "low-speed"
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- "high-speed"
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description: |
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Pin speed. The default value of slew-rate is the SoC power-on-reset
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value. Please refer to the data sheet as a small number of pins
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may have a different default and some pins do not implement
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slew rate adjustment.
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drive-strength:
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required: false
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type: string
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default: "1x"
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enum:
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- "1x"
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- "2x"
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- "4x"
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- "6x"
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description: |
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Pin output drive strength for PIO and PIO-24 pin types. Default
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is "1x" for most pins. PIO pins are 2, 4, 8, or 12 mA. PIO-24 pins
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are 4, 8, 16, or 24 mA. Please refer to the data sheet for each
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pin's PIO type and default drive strength.
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