zephyr/soc/arm/st_stm32/stm32f3/soc.c

50 lines
880 B
C

/*
* Copyright (c) 2016 RnDity Sp. z o.o.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief System/hardware module for STM32F3 processor
*/
#include <device.h>
#include <init.h>
#include <arch/cpu.h>
#include <cortex_m/exc.h>
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
static int stm32f3_init(struct device *arg)
{
u32_t key;
ARG_UNUSED(arg);
key = irq_lock();
z_clearfaults();
/* Install default handler that simply resets the CPU
* if configured in the kernel, NOP otherwise
*/
NMI_INIT();
irq_unlock(key);
/* Update CMSIS SystemCoreClock variable (HCLK) */
/* At reset, system core clock is set to 8 MHz from HSI */
SystemCoreClock = 8000000;
return 0;
}
SYS_INIT(stm32f3_init, PRE_KERNEL_1, 0);