91 lines
2.3 KiB
C
91 lines
2.3 KiB
C
/*
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* Copyright (c) 2015 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief board configuration macros for the Quark SE
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* This header file is used to specify and describe board-level aspects for
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* the Quark SE Platform.
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*/
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#ifndef __SOC_H_
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#define __SOC_H_
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#include <zephyr/types.h>
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#include <misc/util.h>
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#include <uart.h>
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#ifdef CONFIG_IOAPIC
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#include <drivers/ioapic.h>
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#endif
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#define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
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#ifndef _ASMLANGUAGE
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/* Base Register */
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#define SCSS_REGISTER_BASE 0xB0800000
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#define INT_UNMASK_IA (~0x00000001)
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/* Clock */
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#define CLOCK_PERIPHERAL_BASE_ADDR (SCSS_REGISTER_BASE + 0x18)
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#define CLOCK_EXTERNAL_BASE_ADDR (SCSS_REGISTER_BASE + 0x24)
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#define CLOCK_SENSOR_BASE_ADDR (SCSS_REGISTER_BASE + 0x28)
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#define CLOCK_SYSTEM_CLOCK_CONTROL (SCSS_REGISTER_BASE + SCSS_CCU_SYS_CLK_CTL)
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/* ARC INIT */
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#define RESET_VECTOR CONFIG_SS_RESET_VECTOR
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#define SCSS_SS_CFG 0x0600
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#define SCSS_SS_STS 0x0604
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#define ARC_HALT_INT_REDIR (1 << 26)
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#define ARC_HALT_REQ_A (1 << 25)
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#define ARC_RUN_REQ_A (1 << 24)
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#define ARC_RUN (ARC_HALT_INT_REDIR | ARC_RUN_REQ_A)
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#define ARC_HALT (ARC_HALT_INT_REDIR | ARC_HALT_REQ_A)
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/* The CPU-visible IRQ numbers change between the ARC and IA cores,
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* and QMSI itself has no easy way to pick the correct one, though it
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* does have the necessary information to do it ourselves (in the meantime).
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* This macro will be used by the shim drivers to get the IRQ number to
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* use, and it should always be called using the QM_IRQ_*_INT macro
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* provided by QMSI.
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*/
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#define IRQ_GET_NUMBER(_irq) _irq
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/*
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* PINMUX configuration settings
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*/
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#define PINMUX_BASE_ADDR 0xb0800900
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#define UART_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)
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#ifdef CONFIG_SPI_DW
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#define SPI_DW_PORT_0_INT_MASK (SCSS_REGISTER_BASE + 0x454)
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#define SPI_DW_PORT_1_INT_MASK (SCSS_REGISTER_BASE + 0x458)
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#define SPI_DW_PORT_2_INT_MASK (SCSS_REGISTER_BASE + 0x45C)
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#define DT_SPI_DW_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)
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#endif /* CONFIG_SPI_DW */
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#ifdef CONFIG_USB_DW
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#define USB_DW_BASE QM_USB_0_BASE
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#define USB_DW_IRQ QM_IRQ_USB_0_INT
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#endif
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#endif /* _ASMLANGUAGE */
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#ifdef CONFIG_ARC_INIT
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int z_arc_init(struct device *arg);
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#endif /* CONFIG_ARC_INIT */
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#endif /* __SOC_H_ */
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