68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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* Copyright (c) 2016 Linaro Limited.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file SoC configuration macros for the ST STM32F4 family processors.
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*
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* Based on reference manual:
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* RM0368 Reference manual STM32F401xB/C and STM32F401xD/E
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* advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 2.3: Memory Map
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*/
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#ifndef _STM32F4_SOC_H_
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#define _STM32F4_SOC_H_
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#define GPIO_REG_SIZE 0x400
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/* base address for where GPIO registers start */
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#define GPIO_PORTS_BASE (GPIOA_BASE)
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <misc/util.h>
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#include <drivers/rand32.h>
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#include <stm32f4xx.h>
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/* IO pin functions */
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enum stm32f4x_pin_config_mode {
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STM32F4X_PIN_CONFIG_DRIVE_PUSH_PULL,
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STM32F4X_PIN_CONFIG_DRIVE_PUSH_UP,
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STM32F4X_PIN_CONFIG_DRIVE_PUSH_DOWN,
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STM32F4X_PIN_CONFIG_DRIVE_OPEN_DRAIN,
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STM32F4X_PIN_CONFIG_DRIVE_OPEN_UP,
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STM32F4X_PIN_CONFIG_DRIVE_OPEN_DOWN,
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STM32F4X_PIN_CONFIG_AF_PUSH_PULL,
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STM32F4X_PIN_CONFIG_AF_PUSH_UP,
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STM32F4X_PIN_CONFIG_AF_PUSH_DOWN,
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STM32F4X_PIN_CONFIG_AF_OPEN_DRAIN,
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STM32F4X_PIN_CONFIG_AF_OPEN_UP,
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STM32F4X_PIN_CONFIG_AF_OPEN_DOWN,
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STM32F4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
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STM32F4X_PIN_CONFIG_BIAS_PULL_UP,
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STM32F4X_PIN_CONFIG_BIAS_PULL_DOWN,
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STM32F4X_PIN_CONFIG_ANALOG,
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};
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#include "soc_irq.h"
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32F4_SOC_H_ */
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