141 lines
3.7 KiB
C
141 lines
3.7 KiB
C
/*
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* Copyright (c) 2013-2016 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions (ARM)
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*
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* This file contains private kernel function definitions and various
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* other definitions for the ARM Cortex-M processor architecture family.
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*
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* This file is also included by assembly language files which must #define
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* _ASMLANGUAGE before including this header file. Note that kernel
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* assembly source files obtains structure offset values via "absolute symbols"
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* in the offsets.o module.
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*/
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/* this file is only meant to be included by kernel_structs.h */
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#ifndef ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_
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#define ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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extern void _FaultInit(void);
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extern void _CpuIdleInit(void);
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#ifdef CONFIG_ARM_MPU
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extern void z_arch_configure_static_mpu_regions(void);
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extern void z_arch_configure_dynamic_mpu_regions(struct k_thread *thread);
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#endif /* CONFIG_ARM_MPU */
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static ALWAYS_INLINE void kernel_arch_init(void)
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{
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_InterruptStackSetup();
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_ExcSetup();
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_FaultInit();
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_CpuIdleInit();
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}
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static ALWAYS_INLINE void unlock_interrupts(void)
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{
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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__enable_irq();
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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__enable_irq();
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__enable_fault_irq();
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__set_BASEPRI(0);
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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}
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static ALWAYS_INLINE void
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z_arch_switch_to_main_thread(struct k_thread *main_thread,
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k_thread_stack_t *main_stack,
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size_t main_stack_size, k_thread_entry_t _main)
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{
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#ifdef CONFIG_ARM_MPU
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/* Configure static memory map. This will program MPU regions,
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* to set up access permissions for fixed memory sections, such
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* as Application Memory or No-Cacheable SRAM area.
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*
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* This function is invoked once, upon system initialization.
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*/
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z_arch_configure_static_mpu_regions();
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#endif
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/* get high address of the stack, i.e. its start (stack grows down) */
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char *start_of_main_stack;
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#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT) && \
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defined(CONFIG_USERSPACE)
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start_of_main_stack =
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K_THREAD_STACK_BUFFER(main_stack) + main_stack_size -
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MPU_GUARD_ALIGN_AND_SIZE;
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#else
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start_of_main_stack =
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K_THREAD_STACK_BUFFER(main_stack) + main_stack_size;
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#endif
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start_of_main_stack = (void *)STACK_ROUND_DOWN(start_of_main_stack);
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#ifdef CONFIG_TRACING
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z_sys_trace_thread_switched_out();
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#endif
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_current = main_thread;
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#ifdef CONFIG_TRACING
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z_sys_trace_thread_switched_in();
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#endif
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/* the ready queue cache already contains the main thread */
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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/* Set PSPLIM register for built-in stack guarding of main thread. */
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
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__set_PSPLIM((u32_t)main_stack);
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#else
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#error "Built-in PSP limit checks not supported by HW"
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#endif
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#endif /* CONFIG_BUILTIN_STACK_GUARD */
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__set_PSP((u32_t)start_of_main_stack);
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unlock_interrupts();
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#ifdef CONFIG_ARM_MPU
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/*
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* If stack protection is enabled, make sure to set it
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* before jumping to thread entry function
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*/
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z_arch_configure_dynamic_mpu_regions(main_thread);
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#endif
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z_thread_entry(_main, 0, 0, 0);
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CODE_UNREACHABLE;
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}
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static ALWAYS_INLINE void
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z_set_thread_return_value(struct k_thread *thread, unsigned int value)
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{
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thread->arch.swap_return_value = value;
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}
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extern void k_cpu_atomic_idle(unsigned int key);
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#define z_is_in_isr() _IsInIsr()
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extern FUNC_NORETURN void _arm_userspace_enter(k_thread_entry_t user_entry,
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void *p1, void *p2, void *p3,
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u32_t stack_end,
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u32_t stack_start);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_ */
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