Andrew Boie ee3c50ba6d x86: apic: use device MMIO APIs ... A hack was required for the loapic code due to the address range not being in DTS. A bug was filed. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2020-07-17 11:38:18 +02:00
..
cache.c	arch: x86: core: Add cache flush function for x86	2020-07-15 15:53:26 -07:00
cache_s.S	arch/x86: move include/arch/x86/asm.h to include/arch/x86/ia32/asm.h	2019-07-02 19:30:00 -04:00
crt0.S	interrupt_controller: program local APIC LDR register for xAPIC	2020-05-08 22:32:39 -04:00
excstub.S	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00
fatal.c	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00
float.c	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00
intstub.S	x86: apic: use device MMIO APIs	2020-07-17 11:38:18 +02:00
irq_manage.c	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00
irq_offload.c	kernel: rename z_arch_ to arch_	2019-11-07 15:21:46 -08:00
swap.S	kconfig: Rename x86 FPU sharing symbols	2020-05-08 10:58:33 +02:00
thread.c	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00
userspace.S	zephyr: replace zephyr integer types with C99 types	2020-06-08 08:23:57 -05:00