86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/*
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* Copyright (c) 2018 Foundries.io
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT openisa_rv32m1_pcc
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#include <errno.h>
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#include <soc.h>
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#include <drivers/clock_control.h>
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#include <fsl_clock.h>
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(clock_control);
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struct rv32m1_pcc_config {
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u32_t base_address;
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};
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#define DEV_CFG(dev) ((struct rv32m1_pcc_config *)(dev->config->config_info))
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#define DEV_BASE(dev) (DEV_CFG(dev)->base_address)
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static inline clock_ip_name_t clock_ip(struct device *dev,
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clock_control_subsys_t sub_system)
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{
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u32_t offset = POINTER_TO_UINT(sub_system);
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return MAKE_PCC_REGADDR(DEV_BASE(dev), offset);
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}
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static int rv32m1_pcc_on(struct device *dev, clock_control_subsys_t sub_system)
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{
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CLOCK_EnableClock(clock_ip(dev, sub_system));
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return 0;
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}
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static int rv32m1_pcc_off(struct device *dev, clock_control_subsys_t sub_system)
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{
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CLOCK_DisableClock(clock_ip(dev, sub_system));
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return 0;
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}
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static int rv32m1_pcc_get_rate(struct device *dev,
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clock_control_subsys_t sub_system,
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u32_t *rate)
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{
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*rate = CLOCK_GetIpFreq(clock_ip(dev, sub_system));
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return 0;
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}
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static int rv32m1_pcc_init(struct device *dev)
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{
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return 0;
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}
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static const struct clock_control_driver_api rv32m1_pcc_api = {
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.on = rv32m1_pcc_on,
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.off = rv32m1_pcc_off,
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.get_rate = rv32m1_pcc_get_rate,
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};
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#if DT_HAS_DRV_INST(0)
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static struct rv32m1_pcc_config rv32m1_pcc0_config = {
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.base_address = DT_INST_REG_ADDR(0)
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};
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DEVICE_AND_API_INIT(rv32m1_pcc0, DT_INST_LABEL(0),
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&rv32m1_pcc_init,
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NULL, &rv32m1_pcc0_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_OBJECTS,
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&rv32m1_pcc_api);
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#endif
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#if DT_HAS_DRV_INST(1)
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static struct rv32m1_pcc_config rv32m1_pcc1_config = {
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.base_address = DT_INST_REG_ADDR(1)
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};
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DEVICE_AND_API_INIT(rv32m1_pcc1, DT_INST_LABEL(1),
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&rv32m1_pcc_init,
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NULL, &rv32m1_pcc1_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_OBJECTS,
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&rv32m1_pcc_api);
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#endif
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