45 lines
1.0 KiB
Plaintext
45 lines
1.0 KiB
Plaintext
#
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# Copyright 2023 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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# ARM Options
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CONFIG_AARCH64_IMAGE_HEADER=y
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CONFIG_ARMV8_A_NS=y
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# The number of bits used for PAs and VAs
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# from Zephyr needs to match the number of
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# bits used for said address used by Jailhouse.
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CONFIG_ARM64_VA_BITS_40=y
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CONFIG_ARM64_PA_BITS_40=y
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# Cache Options
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_ICACHE_LINE_SIZE_DETECT=y
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# SOF doesn't currently support the usage of
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# run-time data cache line size detection.
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# Because of this, CONFIG_DCACHE_LINE_SIZE_DETECT
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# (which defaults to n) can't be set to 'y'.
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# The size of data cache line will have to be
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# set manually to 64 (value taken from A55 TRM).
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CONFIG_DCACHE_LINE_SIZE=64
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# Platform Configuration
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CONFIG_SOC_SERIES_MIMX9_A55=y
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CONFIG_SOC_MIMX93_A55=y
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CONFIG_BOARD_MIMX93_EVK_A55=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_CLOCK_CONTROL=y
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CONFIG_PINCTRL=y
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# Enable dynamic interrupts
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CONFIG_DYNAMIC_INTERRUPTS=y
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