zephyr/boards/arm64/mimx93_evk/mimx93_evk_a55_sof.dts

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/*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nxp/nxp_mimx93_a55.dtsi>
#include "mimx93_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX93 A55";
compatible = "fsl,mimx93";
chosen {
zephyr,console = &lpuart2;
zephyr,shell-uart = &lpuart2;
zephyr,sram = &sram0;
};
cpus {
cpu@0 {
status = "disabled";
};
};
/* Inmate memory, reserved through "mem=1248MB" boot argument,
* starts at 0xce000000.
*/
sram0: memory@ce000000 {
reg = <0xce000000 DT_SIZE_M(1)>;
};
/* TODO: all of the nodes below are needed by SOF and should
* be removed once all drivers used by SOF have been moved
* to Zephyr.
*
* They are added in the DTS for the sake of not using hardcoded
* values in mmu_regions.c
*/
mu2_a: memory@42430000 {
reg = <0x42430000 DT_SIZE_K(64)>;
};
sai3: memory@42660000 {
reg = <0x42660000 DT_SIZE_K(64)>;
};
edma2_ch0: memory@42010000 {
reg = <0x42010000 DT_SIZE_K(32)>;
};
edma2_ch1: memory@42018000 {
reg = <0x42018000 DT_SIZE_K(32)>;
};
outbox: memory@ce100000 {
reg = <0xce100000 DT_SIZE_K(4)>;
};
inbox: memory@ce101000 {
reg = <0xce101000 DT_SIZE_K(4)>;
};
stream: memory@ce102000 {
reg = <0xce102000 DT_SIZE_K(4)>;
};
/* TODO: this is extremely bad and it's needed here because of
* the fact that the DMA buffer shared by host and FW is situated
* in this region. For now, it's easier to create a mapping for the
* whole region but in the future a mapping should only be created
* for the physical address of the buffer sent to the FW through an
* IPC.
*/
host_ram: memory@80000000 {
reg = <0x80000000 DT_SIZE_M(1024)>;
};
};
&lpuart2 {
status = "okay";
current-speed = <115200>;
/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};