323 lines
9.1 KiB
Plaintext
323 lines
9.1 KiB
Plaintext
/*
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* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for the esp32c3 platform.
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*/
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#include <devicetree.h>
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#include <autoconf.h>
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#include <linker/sections.h>
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#include <linker/linker-defs.h>
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#include <linker/linker-tool.h>
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#define ROMABLE_REGION drom0_0_seg :drom0_0_phdr
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#define RAMABLE_REGION dram0_0_seg :dram0_0_phdr
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#define IRAM_REGION iram0_0_seg :iram0_0_phdr
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#define FLASH_CODE_REGION irom0_0_seg :irom0_0_phdr
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#define SRAM_IRAM_START 0x4037C000
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#define SRAM_DRAM_START 0x3FC7C000
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#define ICACHE_SIZE 0x4000 /* ICache size is fixed to 16KB on ESP32-C3 */
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#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
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#define SRAM_DRAM_END 0x403D0000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
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#define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE)
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#define SRAM_DRAM_ORG (SRAM_DRAM_START + ICACHE_SIZE)
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#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
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/* Global symbols required for espressif hal build */
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MEMORY
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{
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iram0_0_seg(RX): org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
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irom0_0_seg(RX): org = 0x42000020, len = 0x8000000-0x20
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drom0_0_seg (R) : org = 0x3C000020, len = 0x8000000-0x20
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dram0_0_seg(RW): org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE
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rtc_iram_seg(RWX): org = 0x50000000, len = 0x2000
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#ifdef CONFIG_GEN_ISR_TABLES
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IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
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#endif
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}
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PHDRS
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{
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drom0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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iram0_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(__start)
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_rom_store_table = 0;
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SECTIONS
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{
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#include <linker/rel-sections.ld>
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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*rtc_wake_stub*.o(.literal .text .literal.* .text.*)
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} > rtc_iram_seg
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/* This section is required to skip rtc.text area because the text and
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* data segments reflect the same address space on different buses.
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*/
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.rtc.dummy (NOLOAD):
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{
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. = SIZEOF(.rtc.text);
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} > rtc_iram_seg
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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*rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_iram_seg
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.o(.bss .bss.*)
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*rtc_wake_stub*.o(COMMON)
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_iram_seg
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.iram0.text : ALIGN(4)
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{
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/* Vectors go to IRAM */
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_iram_start = ABSOLUTE(.);
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_iram_text_start = ABSOLUTE(.);
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_init_start = ABSOLUTE(.);
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KEEP(*(.exception_vectors.text));
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. = ALIGN(256);
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KEEP(*(.exception.entry*)); /* contains __irq_wrapper */
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*(.exception.other*)
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. = ALIGN(4);
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. = ALIGN (4);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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. = ALIGN(4);
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*(.iram1 .iram1.*)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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*libkernel.a:(.literal .text .literal.* .text.*)
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*libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_noos.*(.literal .text .literal.* .text.*)
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*libzephyr.a:esp32c3_sys_timer.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_core.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cbprintf_complete.*(.literal .text .literal.* .text.*)
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*libzephyr.a:printk.*(.literal.printk .literal.vprintk .literal.char_out .text.printk .text.vprintk .text.char_out)
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*libzephyr.a:log_msg.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_list.*(.literal .text .literal.* .text.*)
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*libzephyr.a:uart_console.*(.literal.console_out .text.console_out)
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*libzephyr.a:log_output.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*)
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*liblib__libc__minimal.a:string.*(.literal .text .literal.* .text.*)
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*libgcov.a:(.literal .text .literal.* .text.*)
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. = ALIGN(4);
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_init_end = ABSOLUTE(.);
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_iram_text_end = ABSOLUTE(.); *(.srodata)
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_iram_end = ABSOLUTE(.);
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} GROUP_LINK_IN(IRAM_REGION)
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/**
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* This section is required to skip .iram0.text area because iram0_0_seg and
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* dram0_0_seg reflect the same address space on different buses.
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*/
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.dram0.dummy (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
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} > dram0_0_seg
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#include <linker/common-ram.ld>
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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__global_pointer$ = . + 0x800;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*libkernel.a:fatal.*(.rodata .rodata.*)
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*libkernel.a:init.*(.rodata .rodata.*)
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*libzephyr.a:cbprintf_complete*(.rodata .rodata.*)
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*libzephyr.a:log_core.*(.rodata .rodata.*)
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*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
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*libzephyr.a:log_output.*(.rodata .rodata.*)
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. = ALIGN(4);
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__esp_log_const_start = .;
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KEEP(*(SORT(.log_const_*)));
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__esp_log_const_end = .;
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. = ALIGN(4);
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__esp_log_backends_start = .;
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KEEP(*("._log_backend.*"));
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__esp_log_backends_end = .;
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} GROUP_LINK_IN(RAMABLE_REGION)
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/* Shared RAM */
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dram0.bss (NOLOAD) :
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{
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. = ALIGN (8);
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__bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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__bss_end = ABSOLUTE(.);
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),)
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{
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. = ALIGN (8);
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*(.noinit)
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*(".noinit.*")
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. = ALIGN (8);
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_heap_start = ABSOLUTE(.);
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} GROUP_LINK_IN(RAMABLE_REGION)
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.flash.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.*)
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_text_end = ABSOLUTE(.);
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_etext = .;
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_flash_cache_start = ABSOLUTE(0);
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} GROUP_LINK_IN(FLASH_CODE_REGION)
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.flash_rodata_dummy (NOLOAD):
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{
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. = SIZEOF(.flash.text);
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. = ALIGN(0x10000) + 0x20;
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_rodata_reserved_start = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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.flash.rodata : ALIGN(0x10)
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
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*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table .gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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. = (. + 3) & ~ 3;
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__eh_frame = ABSOLUTE(.);
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KEEP(*(.eh_frame))
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. = (. + 7) & ~ 3;
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/*
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* C++ constructor and destructor tables
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* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt.
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*
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* RISC-V gcc is configured with --enable-initfini-array so it emits an .init_array section instead.
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* But the init_priority sections will be sorted for iteration in ascending order during startup.
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* The rest of the init_array sections is sorted for iteration in descending order during startup, however.
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* Hence a different section is generated for the init_priority functions which is iterated in
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* ascending order during startup. The corresponding code can be found in startup.c.
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*/
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__init_priority_array_start = ABSOLUTE(.);
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
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__init_priority_array_end = ABSOLUTE(.);
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__init_array_start = ABSOLUTE(.);
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.*(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
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soc_reserved_memory_region_start = ABSOLUTE(.);
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KEEP (*(.reserved_memory_address))
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soc_reserved_memory_region_end = ABSOLUTE(.);
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_thread_local_start = ABSOLUTE(.);
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*(.tdata)
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*(.tdata.*)
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*(.tbss)
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*(.tbss.*)
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*(.srodata)
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*(".srodata.*")
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*(.rodata)
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*(.rodata.*)
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_thread_local_end = ABSOLUTE(.);
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_rodata_reserved_end = ABSOLUTE(.);
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. = ALIGN(4);
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} GROUP_LINK_IN(ROMABLE_REGION)
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#include <linker/common-rom.ld>
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#ifdef CONFIG_GEN_ISR_TABLES
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#include <linker/intlist.ld>
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#endif
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#include <linker/debug-sections.ld>
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/DISCARD/ : { *(.note.GNU-stack) }
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SECTION_PROLOGUE(.riscv.attributes, 0,)
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{
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KEEP(*(.riscv.attributes))
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KEEP(*(.gnu.attributes))
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}
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}
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