zephyr/drivers/usb
Tomasz Moń 19955f6478 drivers: udc_dwc2: Reduce TxFIFO0 allocation size
DWC2 peripherals can have TxFIFO sizes configured to any value between
16 and 32768. The value configured during synthesis is the maximum value
the software can program. Designs that give full flexibility configure
the TxFIFO sizes to value equal to total SPRAM size.

Currently DWC2 driver does not have prior knowledge about the endpoints
used within available configurations and has to come up with TxFIFO0
value up front. The original approach was to use MAX(16, max allowed).
locations. Because DWC2 peripheral cannot have TxFIFO0 with size lower
than 16 locations, always the max allowed was used. This logic prevented
any IN endpoint other than EP0 on designs that have TxFIFO0 size set to
total SPRAM size.

Change the logic to MIN(2 * 16, max allowed) to have sufficient memory
available on flexible designs and allow simultaneous operation if
possible (i.e. when maximum TxFIFO0 size is at least 32).

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-10-23 16:51:38 +02:00
..
bc12
common drivers: udc_dwc2: Add missing GHWCFG bit defines 2024-09-25 12:03:12 +01:00
device drivers: usb_dc_rpi_pico: Implemented vbus detection handling 2024-10-17 10:47:15 -04:00
udc drivers: udc_dwc2: Reduce TxFIFO0 allocation size 2024-10-23 16:51:38 +02:00
uhc
uvb
CMakeLists.txt
Kconfig