179 lines
3.6 KiB
Plaintext
179 lines
3.6 KiB
Plaintext
/*
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* Copyright (c) 2019, Linaro
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/nxp_rt.dtsi>
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&sysclk {
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clock-frequency = <500000000>;
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};
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&itcm {
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reg = <0x00000000 DT_SIZE_K(32)>;
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};
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&dtcm {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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&ocram {
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reg = <0x20200000 DT_SIZE_K(64)>;
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};
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&gpio1 {
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interrupts = <70 0>, <71 0>;
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};
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&gpio5 {
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interrupts = <73 0>;
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};
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&gpt_hw_timer {
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interrupts = <30 0>;
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};
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&gpt2 {
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interrupts = <31 0>;
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gptfreq = <12500000>;
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};
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&usb1 {
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interrupts = <25 0>;
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};
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&flexspi {
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interrupts = <26 0>;
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};
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&flexpwm1_pwm0 {
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interrupts = <34 0>;
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};
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&flexpwm1_pwm1 {
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interrupts = <35 0>;
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};
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&flexpwm1_pwm2 {
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interrupts = <36 0>;
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};
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&flexpwm1_pwm3 {
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interrupts = <37 0>;
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};
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&flexpwm1 {
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interrupts = <38 0>;
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};
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&edma0 {
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dma-channels = <16>;
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};
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/ {
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soc {
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/* Fixup GPIO2 its a different location on RT1010 */
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/delete-node/ gpio@401bc000;
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gpio2: gpio@42000000 {
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compatible = "nxp,imx-gpio";
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reg = <0x42000000 0x4000>;
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interrupts = <72 0>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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pinmux = <&iomuxc_gpio_sd_00_gpio2_io00>,
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<&iomuxc_gpio_sd_01_gpio2_io01>,
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<&iomuxc_gpio_sd_02_gpio2_io02>,
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<&iomuxc_gpio_sd_03_gpio2_io03>,
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<&iomuxc_gpio_sd_04_gpio2_io04>,
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<&iomuxc_gpio_sd_05_gpio2_io05>,
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<&iomuxc_gpio_sd_06_gpio2_io06>,
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<&iomuxc_gpio_sd_07_gpio2_io07>,
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<&iomuxc_gpio_sd_08_gpio2_io08>,
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<&iomuxc_gpio_sd_09_gpio2_io09>,
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<&iomuxc_gpio_sd_10_gpio2_io10>,
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<&iomuxc_gpio_sd_11_gpio2_io11>,
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<&iomuxc_gpio_sd_12_gpio2_io12>,
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<&iomuxc_gpio_sd_13_gpio2_io13>;
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};
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/* Remove GPIO3-GPIO9, they dont exist on RT1010 */
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/delete-node/ gpio@401c0000;
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/delete-node/ gpio@401c4000;
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/delete-node/ gpio@42004000;
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/delete-node/ gpio@42008000;
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/delete-node/ gpio@4200c000;
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/* Fixup LPSPI1 and LPSPI2, they have different base addr on RT1010 */
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/delete-node/ spi@40394000;
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/delete-node/ spi@40398000;
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lpspi1: spi@40194000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40194000 0x4000>;
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interrupts = <32 3>;
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label = "SPI_1";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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lpspi2: spi@40198000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40198000 0x4000>;
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interrupts = <33 3>;
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label = "SPI_2";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* Remove ADC2, it doesn't exist on RT1010 */
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/delete-node/ adc@400C8000;
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};
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};
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/* RT1015 only has two LPSPI blocks */
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/delete-node/ &lpspi3;
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/delete-node/ &lpspi4;
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&gpio1{
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pinmux = <&iomuxc_gpio_00_gpiomux_io00>,
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<&iomuxc_gpio_01_gpiomux_io01>,
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<&iomuxc_gpio_02_gpiomux_io02>,
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<&iomuxc_gpio_03_gpiomux_io03>,
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<&iomuxc_gpio_04_gpiomux_io04>,
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<&iomuxc_gpio_05_gpiomux_io05>,
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<&iomuxc_gpio_06_gpiomux_io06>,
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<&iomuxc_gpio_07_gpiomux_io07>,
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<&iomuxc_gpio_08_gpiomux_io08>,
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<&iomuxc_gpio_09_gpiomux_io09>,
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<&iomuxc_gpio_10_gpiomux_io10>,
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<&iomuxc_gpio_11_gpiomux_io11>,
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<&iomuxc_gpio_12_gpiomux_io12>,
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<&iomuxc_gpio_13_gpiomux_io13>,
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<&iomuxc_gpio_ad_00_gpiomux_io14>,
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<&iomuxc_gpio_ad_01_gpiomux_io15>,
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<&iomuxc_gpio_ad_02_gpiomux_io16>,
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<&iomuxc_gpio_ad_03_gpiomux_io17>,
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<&iomuxc_gpio_ad_04_gpiomux_io18>,
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<&iomuxc_gpio_ad_05_gpiomux_io19>,
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<&iomuxc_gpio_ad_06_gpiomux_io20>,
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<&iomuxc_gpio_ad_07_gpiomux_io21>,
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<&iomuxc_gpio_ad_08_gpiomux_io22>,
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<&iomuxc_gpio_ad_09_gpiomux_io23>,
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<&iomuxc_gpio_ad_10_gpiomux_io24>,
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<&iomuxc_gpio_ad_11_gpiomux_io25>,
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<&iomuxc_gpio_ad_12_gpiomux_io26>,
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<&iomuxc_gpio_ad_13_gpiomux_io27>,
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<&iomuxc_gpio_ad_14_gpiomux_io28>;
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};
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&gpio5{
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pinmux = <&iomuxc_snvs_pmic_on_req_gpio5_io00>;
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};
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