zephyr/dts/arm/aspeed/ast10x0.dtsi

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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2021 ASPEED Technology Inc.
*/
#include <arm/armv7-m.dtsi>
#include <mem.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <0>;
};
};
sram0: memory@0 {
compatible = "mmio-sram";
};
soc {
syscon: syscon@7e6e2000 {
reg = <0x7e6e2000 0x1000>;
};
uart5: serial@7e784000 {
compatible = "ns16550";
reg = <0x7e784000 0x1000>;
interrupts = <8 0>;
status = "disabled";
label = "UART_5";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};