Aurelien Jarno 3d4c5e2dc8 dts/arm/st: wl: change cpu0 compatible to arm,cortex-m4 ... The STM32WL SoC has a Cortex M4 CPU without FPU. Change the cpu0 compatible string accordingly. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2024-05-14 09:38:16 +02:00
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arc/synopsys	…
arm	dts/arm/st: wl: change cpu0 compatible to arm,cortex-m4	2024-05-14 09:38:16 +02:00
arm64	drivers: mfd: add new driver "mfd_adp5585"	2024-05-08 16:09:08 -04:00
bindings	drivers: led_strip: Add length function	2024-05-14 09:33:58 +02:00
common	dts: common: nordic: add ieee802154 node to nrf54h20 cpuapp	2024-05-13 10:21:08 +02:00
nios2/intel	…
posix	…
riscv	ITE: soc: Add the variant of it81302dx	2024-05-13 11:39:10 +02:00
sparc/gaisler	…
x86/intel	board: x86: add acpi hid for gpio	2024-04-22 06:50:38 -07:00
xtensa	intel_adsp: adsp_memory: update mtl memory definitions	2024-05-01 10:31:52 +02:00
Kconfig	…
binding-template.yaml	…