251 lines
9.0 KiB
ReStructuredText
251 lines
9.0 KiB
ReStructuredText
.. _interrupts_v2:
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Interrupts
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##########
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An :dfn:`interrupt service routine` (ISR) is a function that executes
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asynchronously in response to a hardware or software interrupt.
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An ISR normally preempts the execution of the current thread,
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allowing the response to occur with very low overhead.
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Thread execution resumes only once all ISR work has been completed.
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.. contents::
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:local:
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:depth: 2
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Concepts
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********
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Any number of ISRs can be defined, subject to the constraints imposed
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by underlying hardware.
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An ISR has the following key properties:
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* An **interrupt request (IRQ) signal** that triggers the ISR.
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* A **priority level** associated with the IRQ.
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* An **interrupt handler function** that is invoked to handle the interrupt.
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* An **argument value** that is passed to that function.
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An :abbr:`IDT (Interrupt Descriptor Table)` or a vector table is used
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to associate a given interrupt source with a given ISR.
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Only a single ISR can be associated with a specific IRQ at any given time.
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Multiple ISRs can utilize the same function to process interrupts,
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allowing a single function to service a device that generates
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multiple types of interrupts or to service multiple devices
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(usually of the same type). The argument value passed to an ISR's function
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allows the function to determine which interrupt has been signaled.
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The kernel provides a default ISR for all unused IDT entries. This ISR
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generates a fatal system error if an unexpected interrupt is signaled.
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The kernel supports **interrupt nesting**. This allows an ISR to be preempted
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in mid-execution if a higher priority interrupt is signaled. The lower
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priority ISR resumes execution once the higher priority ISR has completed
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its processing.
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An ISR's interrupt handler function executes in the kernel's **interrupt
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context**. This context has its own dedicated stack area (or, on some
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architectures, stack areas). The size of the interrupt context stack must be
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capable of handling the execution of multiple concurrent ISRs if interrupt
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nesting support is enabled.
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.. important::
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Many kernel APIs can be used only by threads, and not by ISRs. In cases
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where a routine may be invoked by both threads and ISRs the kernel
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provides the :cpp:func:`k_is_in_isr()` API to allow the routine to
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alter its behavior depending on whether it is executing as part of
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a thread or as part of an ISR.
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Preventing Interruptions
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========================
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In certain situations it may be necessary for the current thread to
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prevent ISRs from executing while it is performing time-sensitive
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or critical section operations.
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A thread may temporarily prevent all IRQ handling in the system using
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an **IRQ lock**. This lock can be applied even when it is already in effect,
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so routines can use it without having to know if it is already in effect.
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The thread must unlock its IRQ lock the same number of times it was locked
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before interrupts can be once again processed by the kernel while the thread
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is running.
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.. important::
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The IRQ lock is thread-specific. If thread A locks out interrupts
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then performs an operation that allows thread B to run
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(e.g. giving a semaphore or sleeping for N milliseconds), the thread's
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IRQ lock no longer applies once thread A is swapped out. This means
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that interrupts can be processed while thread B is running unless
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thread B has also locked out interrupts using its own IRQ lock.
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(Whether interrupts can be processed while the kernel is switching
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between two threads that are using the IRQ lock is architecture-specific.)
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When thread A eventually becomes the current thread once again, the kernel
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re-establishes thread A's IRQ lock. This ensures thread A won't be
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interrupted until it has explicitly unlocked its IRQ lock.
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Alternatively, a thread may temporarily **disable** a specified IRQ
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so its associated ISR does not execute when the IRQ is signalled.
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The IRQ must be subsequently **enabled** to permit the ISR to execute.
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.. important::
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Disabling an IRQ prevents *all* threads in the system from being preempted
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by the associated ISR, not just the thread that disabled the IRQ.
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Offloading ISR Work
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===================
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An ISR should execute quickly to ensure predictable system operation.
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If time consuming processing is required the ISR should offload some or all
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processing to a thread, thereby restoring the kernel's ability to respond
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to other interrupts.
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The kernel supports several mechanisms for offloading interrupt-related
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processing to a thread.
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* An ISR can signal a helper thread to do interrupt-related processing
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using a kernel object, such as a fifo, lifo, or semaphore.
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* An ISR can signal an alert which causes the system workqueue thread
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to execute an associated alert handler function.
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(See :ref:`alerts_v2`.)
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* An ISR can instruct the system workqueue thread to execute a work item.
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(See TBD.)
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When an ISR offloads work to a thread, there is typically a single context
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switch to that thread when the ISR completes, allowing interrupt-related
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processing to continue almost immediately. However, depending on the
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priority of the thread handling the offload, it is possible that
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the currently executing cooperative thread or other higher-priority threads
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may execute before the thread handling the offload is scheduled.
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Implementation
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**************
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Defining a regular ISR
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======================
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An ISR is defined at run-time by calling :c:macro:`IRQ_CONNECT`. It must
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then be enabled by calling :cpp:func:`irq_enable()`.
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.. important::
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IRQ_CONNECT() is not a C function and does some inline assembly magic
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behind the scenes. All its arguments must be known at build time.
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Drivers that have multiple instances may need to define per-instance
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config functions to configure each instance of the interrupt.
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The following code defines and enables an ISR.
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.. code-block:: c
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#define MY_DEV_IRQ 24 /* device uses IRQ 24 */
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#define MY_DEV_PRIO 2 /* device uses interrupt priority 2 */
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/* argument passed to my_isr(), in this case a pointer to the device */
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#define MY_ISR_ARG DEVICE_GET(my_device)
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#define MY_IRQ_FLAGS 0 /* IRQ flags. Unused on non-x86 */
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void my_isr(void *arg)
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{
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... /* ISR code */
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}
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void my_isr_installer(void)
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{
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...
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IRQ_CONNECT(MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_ISR_ARG, MY_IRQ_FLAGS);
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irq_enable(MY_DEV_IRQ);
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...
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}
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Defining a 'direct' ISR
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=======================
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Regular Zephyr interrupts introduce some overhead which may be unacceptable
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for some low-latency use-cases. Specifically:
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* The argument to the ISR is retrieved and passed to the ISR
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* If power management is enabled and the system was idle, all the hardware
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will be resumed from low-power state before the ISR is executed, which can be
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very time-consuming
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* Although some architectures will do this in hardware, other architectures
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need to switch to the interrupt stack in code
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* After the interrupt is serviced, the OS then performs some logic to
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potentially make a scheduling decision.
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Zephyr supports so-called 'direct' interrupts, which are installed via
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:c:macro:`IRQ_DIRECT_CONNECT`. These direct interrupts have some special
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implementation requirements and a reduced feature set; see the definition
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of :c:macro:`IRQ_DIRECT_CONNECT` for details.
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The following code demonstrates a direct ISR:
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.. code-block:: c
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#define MY_DEV_IRQ 24 /* device uses IRQ 24 */
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#define MY_DEV_PRIO 2 /* device uses interrupt priority 2 */
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/* argument passed to my_isr(), in this case a pointer to the device */
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#define MY_IRQ_FLAGS 0 /* IRQ flags. Unused on non-x86 */
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ISR_DIRECT_DECLARE(my_isr)
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{
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do_stuff();
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ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */
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return 1; /* We should check if scheduling decision should be made */
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}
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void my_isr_installer(void)
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{
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...
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IRQ_DIRECT_CONNECT(MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_IRQ_FLAGS);
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irq_enable(MY_DEV_IRQ);
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...
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}
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Suggested Uses
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**************
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Use a regular or direct ISR to perform interrupt processing that requires a
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very rapid response, and can be done quickly without blocking.
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.. note::
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Interrupt processing that is time consuming, or involves blocking,
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should be handed off to a thread. See `Offloading ISR Work`_ for
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a description of various techniques that can be used in an application.
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Configuration Options
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*********************
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Related configuration options:
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* :option:`CONFIG_ISR_STACK_SIZE`
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Additional architecture-specific and device-specific configuration options
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also exist.
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APIs
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****
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The following interrupt-related APIs are provided by :file:`irq.h`:
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* :c:macro:`IRQ_CONNECT`
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* :c:macro:`IRQ_DIRECT_CONNECT`
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* :c:macro:`ISR_DIRECT_HEADER`
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* :c:macro:`ISR_DIRECT_FOOTER`
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* :c:macro:`ISR_DIRECT_PM`
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* :c:macro:`ISR_DIRECT_DECLARE`
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* :cpp:func:`irq_lock()`
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* :cpp:func:`irq_unlock()`
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* :cpp:func:`irq_enable()`
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* :cpp:func:`irq_disable()`
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* :cpp:func:`irq_is_enabled()`
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The following interrupt-related APIs are provided by :file:`kernel.h`:
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* :cpp:func:`k_is_in_isr()`
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* :cpp:func:`k_is_preempt_thread`
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