zephyr/tests/kernel/timer/starve
Torsten Rasmussen 2760fb9eda tests: added kernel tests for arm arch with linker script generator
This commit adds an additional test case for several kernel test suites
to ensure that the linker script generator is working correctly for a
subset of the Zephyr test suites.

The ensures that the basic functionality of the linker script generator
is working while still keep the performance impact on CI at a minimal
level.

Using the kernel tests is a trade-off between testing coverage of the
linker script generator and the time it takes to complete CI.

The kernel tests is considered to have the broadest coverage of various
features important for the generated linker script.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00
..
src
CMakeLists.txt
Kconfig
README.txt
prj.conf
testcase.yaml tests: added kernel tests for arm arch with linker script generator 2021-08-30 08:54:23 -04:00

README.txt

Title: Timer Starvation test

The purpose of the test is to detect whether the timer implementation
correctly handles situations where only one timeout is present, and that
timeout is repeatedly rescheduled before it has a chance to fire.  In
some implementations this may prevent the timer interrupt handler from
ever being invoked, which in turn prevents an announcement of ticks.
Lack of tick announcement propagates into a monotonic increase in the
value returned by sys_clock_elapsed().

This test is not run in automatic test suites because it generally takes
minutes, hours, or days to fail, depending on the hardware clock rate
and the tick rate.  By default the test passes if one hour passes
without detecting a failure.

Failure will occur when some counter wraps around.  This may be a
hardware timer counter, a timer driver internal calculation of
unannounced cycles, or the Zephyr measurement of unannounced ticks.

For example a system that uses a 32768-Hz internal timer counter with
24-bit resolution and determines elapsed time by a 24-bit unsigned
difference between the current and last-recorded counter value will fail
at 512 s when the updated counter value is observed to be less than the
last recorded counter.

Systems that use a 32-bit counter of 80 MHz ticks would fail after
53.687 s.