215 lines
4.5 KiB
Plaintext
215 lines
4.5 KiB
Plaintext
/*
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* Copyright (c) 2020, Seagate Technology LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv6-m.dtsi>
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#include <dt-bindings/clock/lpc11u6x_clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "arm,cortex-m0+";
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reg = <0>;
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};
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};
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sram0:memory@10000000 {
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compatible = "mmio-sram";
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};
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sram1:memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x800>;
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};
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sram2:memory@20004000 {
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compatible = "mmio-sram";
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reg = <0x20004000 0x800>;
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};
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soc {
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flash0:flash@0 {
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compatible = "soc-nv-flash";
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};
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/* On-chip EEPROM. */
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eeprom0: eeprom_0 {
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compatible = "nxp,lpc11u6x-eeprom";
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label = "EEPROM_0";
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/*
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* For some reasons, the IAP commands don't allow to
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* reach the last 64 bytes of the EEPROM.
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*/
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size = <(DT_SIZE_K(4) - 64)>;
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status = "okay";
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};
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/* PIO0_0 to PIO0_23. */
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pinmux0: pinmux@40044000 {
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compatible = "nxp,lpc11u6x-pinmux";
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#pinmux-cells = <2>;
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reg = <0x40044000 0x60>;
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label = "PINMUX_0";
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status = "okay";
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};
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/* PIO1_0 to PIO1_31. */
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pinmux1: pinmux@40044060 {
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compatible = "nxp,lpc11u6x-pinmux";
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#pinmux-cells = <2>;
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reg = <0x40044060 0x80>;
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label = "PINMUX_1";
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status = "okay";
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};
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/* PIO2_0 to PIO2_23. */
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pinmux2: pinmux@400440f0 {
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compatible = "nxp,lpc11u6x-pinmux";
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#pinmux-cells = <2>;
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reg = <0x400440f0 0x64>;
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label = "PINMUX_2";
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status = "okay";
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};
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/* GPIO0_0 to GPIO0_23 */
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gpio0: gpio@0 {
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compatible = "nxp,lpc11u6x-gpio";
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reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
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interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
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<4 2>, <5 2>, <6 2>, <7 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux0>;
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status = "disabled";
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};
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/* GPIO1_0 to GPIO1_31 */
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gpio1: gpio@1 {
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compatible = "nxp,lpc11u6x-gpio";
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reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
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interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
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<4 2>, <5 2>, <6 2>, <7 2>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux1>;
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status = "disabled";
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};
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/* GPIO2_2 to GPIO2_23 */
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gpio2: gpio@2 {
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compatible = "nxp,lpc11u6x-gpio";
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reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
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interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
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<4 2>, <5 2>, <6 2>, <7 2>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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base = <2>;
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ngpios = <22>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux2>;
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status = "disabled";
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};
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syscon: clock-controller@40048000 {
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compatible = "nxp,lpc11u6x-syscon";
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#clock-cells = <1>;
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reg = <0x40048000 0x400>;
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label = "SYSCON";
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pinmuxs = <&pinmux2 0 1>, <&pinmux2 1 1>;
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pinmux-names = "XTALIN", "XTALOUT";
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};
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uart0: serial@40008000 {
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compatible = "nxp,lpc11u6x-uart";
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clocks = <&syscon LPC11U6X_CLOCK_USART0>;
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interrupts = <21 0>;
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reg = <0x40008000 0x60>;
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label = "UART_0";
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status = "disabled";
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};
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uart1: serial@4006c000 {
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compatible = "nxp,lpc11u6x-uart";
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clocks = <&syscon LPC11U6X_CLOCK_USART1>;
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interrupts = <11 0>;
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reg = <0x4006C000 0x30>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: serial@40070000 {
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compatible = "nxp,lpc11u6x-uart";
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clocks = <&syscon LPC11U6X_CLOCK_USART2>;
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interrupts = <12 0>;
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reg = <0x40070000 0x30>;
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label = "UART_2";
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status = "disabled";
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};
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uart3: serial@40074000 {
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compatible = "nxp,lpc11u6x-uart";
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clocks = <&syscon LPC11U6X_CLOCK_USART3>;
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interrupts = <12 0>;
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reg = <0x40074000 0x30>;
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label = "UART_3";
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status = "disabled";
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};
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uart4: serial@4004c000 {
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compatible = "nxp,lpc11u6x-uart";
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clocks = <&syscon LPC11U6X_CLOCK_USART4>;
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interrupts = <11 0>;
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reg = <0x4004C000 0x30>;
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label = "UART_4";
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status = "disabled";
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};
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i2c0: i2c@40000000 {
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compatible = "nxp,lpc11u6x-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40000000 0x40>;
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clocks = <&syscon LPC11U6X_CLOCK_I2C0>;
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interrupts = <15 0>;
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status = "disabled";
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label = "I2C_0";
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};
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i2c1: i2c@40020000 {
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compatible = "nxp,lpc11u6x-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40020000 0x40>;
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clocks = <&syscon LPC11U6X_CLOCK_I2C1>;
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interrupts = <10 0>;
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status = "disabled";
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label = "I2C_1";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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