zephyr/boards/nordic/nrf9280pdk
Dominik Kilian cbaafe209c boards: nordic: ipc: added dcache alignement
The nRF54 and nRF92 chips has data cache, which means
the ICMsg and ICBMsg must be configured to follow required
cache alignment of the shared memory.
The `dcache-alignement` needs to be defined for that.

Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
2024-10-24 03:45:35 +01:00
..
support boards: nordic: update custom JLink reset scheme for ADACv2 2024-10-08 18:17:33 +01:00
Kconfig.defconfig
Kconfig.nrf9280pdk
board.cmake
board.yml boards: Set full_name for all boards 2024-10-10 20:22:21 -04:00
nrf9280pdk_nrf9280-ipc_conf.dtsi boards: nordic: ipc: added dcache alignement 2024-10-24 03:45:35 +01:00
nrf9280pdk_nrf9280-memory_map.dtsi boards: nordic: Flatten shared_ramxx_region nodes 2024-10-15 04:11:21 -04:00
nrf9280pdk_nrf9280-pinctrl.dtsi
nrf9280pdk_nrf9280_cpuapp.dts boards: nordic: Align with updated Nordic owned memory bindings 2024-10-15 04:11:21 -04:00
nrf9280pdk_nrf9280_cpuapp.yaml
nrf9280pdk_nrf9280_cpuapp_defconfig
nrf9280pdk_nrf9280_cpuppr.dts boards: nordic: Do not enable hw-flow-control on console 2024-10-15 04:05:36 -04:00
nrf9280pdk_nrf9280_cpuppr.yaml
nrf9280pdk_nrf9280_cpuppr_defconfig
nrf9280pdk_nrf9280_cpuppr_xip.dts
nrf9280pdk_nrf9280_cpuppr_xip.yaml
nrf9280pdk_nrf9280_cpuppr_xip_defconfig
nrf9280pdk_nrf9280_cpurad.dts boards: nordic: Align with updated Nordic owned memory bindings 2024-10-15 04:11:21 -04:00
nrf9280pdk_nrf9280_cpurad.yaml
nrf9280pdk_nrf9280_cpurad_defconfig