97 lines
1.8 KiB
Plaintext
97 lines
1.8 KiB
Plaintext
/*
|
|
* Copyright (c) 2023 Nordic Semiconductor
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
&pinctrl {
|
|
uart0_default: uart0_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 0, 27)>,
|
|
<NRF_PSEL(UART_RTS, 0, 14)>;
|
|
};
|
|
group2 {
|
|
psels = <NRF_PSEL(UART_RX, 0, 26)>,
|
|
<NRF_PSEL(UART_CTS, 0, 15)>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
uart0_sleep: uart0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 0, 27)>,
|
|
<NRF_PSEL(UART_RX, 0, 26)>,
|
|
<NRF_PSEL(UART_RTS, 0, 14)>,
|
|
<NRF_PSEL(UART_CTS, 0, 15)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
uart1_default: uart1_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 0, 29)>,
|
|
<NRF_PSEL(UART_RTS, 0, 16)>;
|
|
};
|
|
group2 {
|
|
psels = <NRF_PSEL(UART_RX, 0, 28)>,
|
|
<NRF_PSEL(UART_CTS, 0, 17)>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
uart1_sleep: uart1_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 0, 29)>,
|
|
<NRF_PSEL(UART_RX, 0, 28)>,
|
|
<NRF_PSEL(UART_RTS, 0, 16)>,
|
|
<NRF_PSEL(UART_CTS, 0, 17)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
i2c2_default: i2c2_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
|
|
<NRF_PSEL(TWIM_SCL, 0, 31)>;
|
|
};
|
|
};
|
|
|
|
i2c2_sleep: i2c2_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
|
|
<NRF_PSEL(TWIM_SCL, 0, 31)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
pwm0_default: pwm0_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
|
|
};
|
|
};
|
|
|
|
pwm0_sleep: pwm0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
spi3_default: spi3_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
|
|
<NRF_PSEL(SPIM_MISO, 0, 12)>,
|
|
<NRF_PSEL(SPIM_MOSI, 0, 11)>;
|
|
nordic,drive-mode = <NRF_DRIVE_H0H1>;
|
|
};
|
|
};
|
|
|
|
spi3_sleep: spi3_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
|
|
<NRF_PSEL(SPIM_MISO, 0, 12)>,
|
|
<NRF_PSEL(SPIM_MOSI, 0, 11)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
};
|