zephyr/drivers/interrupt_controller
Karol Gugala 1765d75ff4 riscv32: riscv-privilege: Microsemi Mi-V support
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
..
CMakeLists.txt riscv32: riscv-privilege: integrate common code 2018-06-20 11:57:07 -04:00
Kconfig riscv32: riscv-privilege: integrate common code 2018-06-20 11:57:07 -04:00
Kconfig.multilevel
Kconfig.s1000 DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL 2018-06-11 17:27:58 -04:00
Kconfig.shared_irq
Kconfig.stm32 drivers/exti: stm32: Use CMSIS IRQ defines instead of zephyr 2018-06-13 11:43:56 +02:00
arcv2_irq_unit.c
cavs_ictl.c drivers: interrupts: introduce CAVS interrupt logic 2018-05-01 16:46:41 -04:00
cavs_ictl.h drivers: interrupts: introduce CAVS interrupt logic 2018-05-01 16:46:41 -04:00
dw_ictl.c drivers: interrupts: introduce Designware interrupt controller 2018-05-01 16:46:41 -04:00
dw_ictl.h drivers: interrupts: introduce Designware interrupt controller 2018-05-01 16:46:41 -04:00
exti_stm32.c drivers/exti: stm32: Use CMSIS IRQ defines instead of zephyr 2018-06-13 11:43:56 +02:00
exti_stm32.h
i8259.c
ioapic_intr.c
ioapic_priv.h
loapic_intr.c
loapic_spurious.S
mvic.c
plic.c riscv32: riscv-privilege: Microsemi Mi-V support 2018-06-20 11:57:07 -04:00
plic.h riscv32: riscv-privilege: Microsemi Mi-V support 2018-06-20 11:57:07 -04:00
shared_irq.c
system_apic.c