64 lines
1.8 KiB
C
64 lines
1.8 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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* Copyright (c) 2020 Synopsys.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARCv2 Interrupt Unit device driver
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*
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* The ARCv2 interrupt unit has 16 allocated exceptions associated with
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* vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
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* The interrupt unit is optional in the ARCv2-based processors. When
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* building a processor, you can configure the processor to include an
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* interrupt unit. The ARCv2 interrupt unit is highly programmable.
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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/*
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* @brief Initialize the interrupt unit device driver
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*
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* Initializes the interrupt unit device driver and the device
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* itself.
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*
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* Interrupts are still locked at this point, so there is no need to protect
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* the window between a write to IRQ_SELECT and subsequent writes to the
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* selected IRQ's registers.
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*
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* @return 0 for success
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*/
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static int arc_v2_irq_unit_init(const struct device *unused)
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{
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ARG_UNUSED(unused);
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int irq; /* the interrupt index */
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/* Interrupts from 0 to 15 are exceptions and they are ignored
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* by IRQ auxiliary registers. For that reason we skip those
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* values in this loop.
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*/
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for (irq = 16; irq < CONFIG_NUM_IRQS; irq++) {
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY,
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(CONFIG_NUM_IRQ_PRIO_LEVELS-1) |
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_ARC_V2_IRQ_PRIORITY_SECURE); /* lowest priority */
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#else
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY,
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(CONFIG_NUM_IRQ_PRIO_LEVELS-1)); /* lowest priority */
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#endif
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, _ARC_V2_INT_DISABLE);
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z_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, _ARC_V2_INT_LEVEL);
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}
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return 0;
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}
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SYS_INIT(arc_v2_irq_unit_init, PRE_KERNEL_1, 0);
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