387 lines
9.6 KiB
Plaintext
387 lines
9.6 KiB
Plaintext
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Common linker sections
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*
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* This script defines the memory location of the various sections that make up
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* a Zephyr Kernel image. This file is used by the linker.
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*
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* This script places the various sections of the image according to what
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* features are enabled by the kernel's configuration options.
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*
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* For a build that does not use the execute in place (XIP) feature, the script
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* generates an image suitable for loading into and executing from RAMABLE_REGION by
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* placing all the sections adjacent to each other. There is also no separate
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* load address for the DATA section which means it doesn't have to be copied
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* into RAMABLE_REGION.
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*
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* For builds using XIP, there is a different load memory address (LMA) and
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* virtual memory address (VMA) for the DATA section. In this case the DATA
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* section is copied into RAMABLE_REGION at runtime.
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*
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* When building an XIP image the data section is placed into ROMABLE_REGION. In this
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* case, the LMA is set to __data_rom_start so the data section is concatenated
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* at the end of the RODATA section. At runtime, the DATA section is copied
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* into the RAMABLE_REGION region so it can be accessed with read and write permission.
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*
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* Most symbols defined in the sections below are subject to be referenced in
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* the Zephyr Kernel image. If a symbol is used but not defined the linker will
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* emit an undefined symbol error.
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*
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* Please do not change the order of the section as the kernel expects this
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* order when programming the MMU.
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*/
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#define _LINKER
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#define _ASMLANGUAGE
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#include <linker/linker-defs.h>
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#include <offsets.h>
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#include <misc/util.h>
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#include <linker/linker-tool.h>
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#ifdef CONFIG_XIP
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#define ROMABLE_REGION ROM
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#define RAMABLE_REGION RAM
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#else
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#define ROMABLE_REGION RAM
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#define RAMABLE_REGION RAM
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#endif
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#ifdef CONFIG_X86_MMU
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#define MMU_PAGE_SIZE KB(4)
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#define MMU_PAGE_ALIGN . = ALIGN(MMU_PAGE_SIZE);
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#else
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#define MMU_PAGE_ALIGN
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#endif
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/* SECTIONS definitions */
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SECTIONS
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{
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GROUP_START(ROMABLE_REGION)
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#ifdef CONFIG_JAILHOUSE
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/* 16-bit sections */
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. = PHYS_RAM_ADDR;
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SECTION_PROLOGUE(boot, (OPTIONAL),)
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{
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*(.boot)
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. = ALIGN(16);
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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. = ALIGN(8);
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_image_rom_start = PHYS_LOAD_ADDR;
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#ifndef CONFIG_JAILHOUSE
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_image_text_start = PHYS_LOAD_ADDR;
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#else
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_image_text_start = .;
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#endif
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SECTION_PROLOGUE(_TEXT_SECTION_NAME, (OPTIONAL),)
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{
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. = CONFIG_TEXT_SECTION_OFFSET;
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*(.text_start)
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*(".text_start.*")
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*(.text)
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*(".text.*")
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*(.gnu.linkonce.t.*)
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*(.eh_frame)
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*(.init)
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*(.fini)
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*(.eini)
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KEEP(*(.openocd_dbg))
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KEEP(*(".openocd_dbg.*"))
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#include <linker/kobject-text.ld>
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_text_end = .;
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_image_rodata_start = .;
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#include <linker/common-rom.ld>
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SECTION_PROLOGUE(_RODATA_SECTION_NAME, (OPTIONAL),)
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{
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*(.rodata)
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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. = ALIGN(8);
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_idt_base_address = .;
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#ifdef LINKER_PASS2
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KEEP(*(staticIdt))
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#else
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. += CONFIG_IDT_NUM_VECTORS * 8;
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#endif
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#ifndef CONFIG_X86_FIXED_IRQ_MAPPING
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. = ALIGN(4);
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_irq_to_interrupt_vector = .;
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#ifdef LINKER_PASS2
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KEEP(*(irq_int_vector_map))
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#else
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. += CONFIG_MAX_IRQ_LINES;
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#endif
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#endif
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#ifdef CONFIG_CUSTOM_RODATA_LD
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/* Located in project source directory */
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#include <custom-rodata.ld>
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#endif
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#include <linker/kobject-rom.ld>
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_rodata_end = .;
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MMU_PAGE_ALIGN
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#ifdef CONFIG_XIP
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/* Kernel ROM extends to the end of flash. Need to do this to program
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* the MMU
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*/
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_image_rom_end = _image_rom_start + KB(CONFIG_ROM_SIZE);
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#else
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/* ROM ends here, position counter will now be in RAM areas */
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_image_rom_end = .;
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#endif
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_image_rom_size = _image_rom_end - _image_rom_start;
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GROUP_END(ROMABLE_REGION)
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/* RAMABLE_REGION */
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GROUP_START(RAMABLE_REGION)
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#ifdef CONFIG_APPLICATION_MEMORY
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SECTION_DATA_PROLOGUE(_APP_DATA_SECTION_NAME, (OPTIONAL),)
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{
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#ifndef CONFIG_XIP
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MMU_PAGE_ALIGN
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#endif
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_image_ram_start = .;
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__app_ram_start = .;
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__app_data_ram_start = .;
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APP_INPUT_SECTION(.data)
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APP_INPUT_SECTION(".data.*")
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__app_data_ram_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__app_data_rom_start = LOADADDR(_APP_DATA_SECTION_NAME);
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SECTION_PROLOGUE(_APP_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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__app_bss_start = .;
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APP_INPUT_SECTION(.bss)
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APP_INPUT_SECTION(".bss.*")
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APP_INPUT_SECTION(COMMON)
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__app_bss_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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__app_bss_num_words = (__app_bss_end - __app_bss_start) >> 2;
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SECTION_PROLOGUE(_APP_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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APP_INPUT_SECTION(.noinit)
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APP_INPUT_SECTION(".noinit.*")
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MMU_PAGE_ALIGN
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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__app_ram_end = .;
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__app_ram_size = __app_ram_end - __app_ram_start;
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#endif /* CONFIG_APPLICATION_MEMORY */
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SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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/*
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* Without Jailhouse, we get the page alignment here for free by
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* definition of the beginning of the "RAMable" region on the board
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* configurations. With Jailhouse, everything falls in RAM and we
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* try to glue sections in sequence, thus we have to realign here so
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* that gen_mmu.py does not complain.
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*/
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#ifdef CONFIG_JAILHOUSE
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MMU_PAGE_ALIGN
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#endif
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/*
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* For performance, BSS section is forced to be both 4 byte aligned and
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* a multiple of 4 bytes.
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*/
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. = ALIGN(4);
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#ifndef CONFIG_APPLICATION_MEMORY
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_image_ram_start = .;
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#endif
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__kernel_ram_start = .;
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__bss_start = .;
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KERNEL_INPUT_SECTION(.bss)
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KERNEL_INPUT_SECTION(".bss.*")
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KERNEL_INPUT_SECTION(COMMON)
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*(".kernel_bss.*")
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/*
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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*/
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. = ALIGN(4);
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__bss_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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__bss_num_words = (__bss_end - __bss_start) >> 2;
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SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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/*
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* This section is used for non-initialized objects that
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* will not be cleared during the boot process.
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*/
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KERNEL_INPUT_SECTION(.noinit)
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KERNEL_INPUT_SECTION(".noinit.*")
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*(".kernel_noinit.*")
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MMU_PAGE_ALIGN
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME, (OPTIONAL),)
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{
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__data_ram_start = .;
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KERNEL_INPUT_SECTION(.data)
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KERNEL_INPUT_SECTION(".data.*")
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*(".kernel.*")
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#ifdef CONFIG_CUSTOM_RWDATA_LD
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/* Located in project source directory */
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#include <custom-rwdata.ld>
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#endif
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#ifdef CONFIG_GDT_DYNAMIC
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KEEP(*(.tss))
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. = ALIGN(8);
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_gdt = .;
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#ifdef LINKER_PASS2
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KEEP(*(gdt_ram_data))
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#else /* LINKER_PASS2 */
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#ifdef CONFIG_USERSPACE
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#define GDT_NUM_ENTRIES 7
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#elif defined(CONFIG_HW_STACK_PROTECTION)
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#define GDT_NUM_ENTRIES 5
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#else
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#define GDT_NUM_ENTRIES 3
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#endif /* CONFIG_X86_USERSPACE */
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. += GDT_NUM_ENTRIES * 8;
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#endif /* LINKER_PASS2 */
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#endif /* CONFIG_GDT_DYNAMIC */
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. = ALIGN(4);
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__data_rom_start = LOADADDR(_DATA_SECTION_NAME);
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#include <linker/common-ram.ld>
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#ifdef CONFIG_X86_MMU
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/* Can't really predict the size of this section. Anything after this
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* should not be affected if addresses change between builds (currently
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* just the gperf tables which is fine).
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*
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* However, __mmu_tables_start *must* remain stable between builds,
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* we can't have anything shifting the memory map beforehand.
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*/
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SECTION_DATA_PROLOGUE(mmu_tables, (OPTIONAL),)
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{
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/* Page Tables are located here if MMU is enabled.*/
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MMU_PAGE_ALIGN
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__mmu_tables_start = .;
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KEEP(*(.mmu_data));
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__mmu_tables_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif
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#include <linker/kobject.ld>
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MMU_PAGE_ALIGN
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__data_ram_end = .;
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/* All unused memory also owned by the kernel for heaps */
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__kernel_ram_end = PHYS_RAM_ADDR + KB(CONFIG_RAM_SIZE);
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__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
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_image_ram_end = .;
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_image_ram_all = (PHYS_RAM_ADDR + KB(CONFIG_RAM_SIZE)) - _image_ram_start;
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_end = .; /* end of image */
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GROUP_END(RAMABLE_REGION)
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#ifndef LINKER_PASS2
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/* static interrupts */
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SECTION_PROLOGUE(intList, (OPTIONAL),)
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{
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KEEP(*(.spurIsr))
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KEEP(*(.spurNoErrIsr))
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__INT_LIST_START__ = .;
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LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
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KEEP(*(.intList))
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KEEP(*(.gnu.linkonce.intList.*))
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__INT_LIST_END__ = .;
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} > IDT_LIST
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#ifdef CONFIG_X86_MMU
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/* Memory management unit*/
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SECTION_PROLOGUE(mmulist, (OPTIONAL),)
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{
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/* get size of the mmu lists needed for gen_mmu_x86.py*/
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LONG((__MMU_LIST_END__ - __MMU_LIST_START__) / __MMU_REGION_SIZEOF)
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/* Get the start of mmu tables in data section so that the address
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* of the page tables can be calculated.
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*/
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LONG(__mmu_tables_start)
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__MMU_LIST_START__ = .;
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KEEP(*(.mmulist))
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__MMU_LIST_END__ = .;
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} > MMU_LIST
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#endif /* CONFIG_X86_MMU */
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#else
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/DISCARD/ :
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{
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KEEP(*(.spurIsr))
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KEEP(*(.spurNoErrIsr))
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KEEP(*(.intList))
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KEEP(*(.gnu.linkonce.intList.*))
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KEEP(*(.mmulist))
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}
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#endif
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#ifdef CONFIG_CUSTOM_SECTIONS_LD
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/* Located in project source directory */
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#include <custom-sections.ld>
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#endif
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}
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#ifdef CONFIG_XIP
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/*
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* Round up number of words for DATA section to ensure that XIP copies the
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* entire data section. XIP copy is done in words only, so there may be up
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* to 3 extra bytes copied in next section (BSS). At run time, the XIP copy
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* is done first followed by clearing the BSS section.
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*/
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__data_size = (__data_ram_end - __data_ram_start);
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__data_num_words = (__data_size + 3) >> 2;
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#ifdef CONFIG_APPLICATION_MEMORY
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__app_data_size = (__app_data_ram_end - __app_data_ram_start);
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__app_data_num_words = (__app_data_size + 3) >> 2;
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#endif
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#endif
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