..
f0
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
f1
drivers/clock_control: stm32 common: Use new bus clock bindings
2022-04-21 14:09:44 +02:00
f2
dts: arm: st: stm32f2: Add missing timers to DTS
2022-04-26 11:44:29 +02:00
f3
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
f4
drivers/clock_control: stm32 common: Use new bus clock bindings
2022-04-21 14:09:44 +02:00
f7
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
g0
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
g4
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
h7
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
l0
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
l1
drivers/clock_control: stm32 common: Use new bus clock bindings
2022-04-21 14:09:44 +02:00
l4
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
l5
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
mp1
dts: arm: st: include <dt-bindings/pwm/stm32_pwm.h>
2022-04-07 09:35:16 +02:00
u5
dts: arm: st: u5: add fdcan to stm32u5 series
2022-05-05 14:35:37 -05:00
wb
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00
wl
drivers: clock_control: Make LSE driving configurable
2022-04-29 16:11:34 +02:00