zephyr/arch/riscv32
Ramesh Thomas 62eea121b3 kernel: tickless: Rename _Swap to allow creation of macro
Future tickless kernel patches would be inserting some
code before call to Swap. To enable this it will create
a mcro named as the current _Swap which would call first
the tickless kernel code and then call the real __swap()

Jira: ZEP-339
Change-Id: Id778bfcee4f88982c958fcf22d7f04deb4bd572f
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2017-04-27 13:46:26 +00:00
..
core kernel: tickless: Rename _Swap to allow creation of macro 2017-04-27 13:46:26 +00:00
include kernel: expose struct k_thread implementation 2017-04-26 16:29:06 +00:00
soc arch: convert to using newly introduced integer sized types 2017-04-21 12:08:12 +00:00
Kbuild riscv32: added the riscv-privilege SOC_FAMILY 2017-03-20 23:19:35 +00:00
Kconfig riscv32: enable gen_isr_tables mechanism 2017-02-15 04:49:17 +00:00
Makefile riscv32: added the riscv-privilege SOC_FAMILY 2017-03-20 23:19:35 +00:00
defconfig arch: added support for the riscv32 architecture 2017-01-13 19:52:23 +00:00