96 lines
3.4 KiB
C
96 lines
3.4 KiB
C
/*
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* Copyright (c) 2020, Seagate Technology LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_I2C_I2C_LPC11U6X_H_
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#define ZEPHYR_DRIVERS_I2C_I2C_LPC11U6X_H_
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#define LPC11U6X_I2C_CONTROL_AA (1 << 2)
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#define LPC11U6X_I2C_CONTROL_SI (1 << 3)
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#define LPC11U6X_I2C_CONTROL_STOP (1 << 4)
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#define LPC11U6X_I2C_CONTROL_START (1 << 5)
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#define LPC11U6X_I2C_CONTROL_I2C_EN (1 << 6)
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/* I2C controller states */
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#define LPC11U6X_I2C_MASTER_TX_START 0x08
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#define LPC11U6X_I2C_MASTER_TX_RESTART 0x10
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#define LPC11U6X_I2C_MASTER_TX_ADR_ACK 0x18
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#define LPC11U6X_I2C_MASTER_TX_ADR_NACK 0x20
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#define LPC11U6X_I2C_MASTER_TX_DAT_ACK 0x28
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#define LPC11U6X_I2C_MASTER_TX_DAT_NACK 0x30
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#define LPC11U6X_I2C_MASTER_TX_ARB_LOST 0x38
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#define LPC11U6X_I2C_MASTER_RX_ADR_ACK 0x40
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#define LPC11U6X_I2C_MASTER_RX_ADR_NACK 0x48
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#define LPC11U6X_I2C_MASTER_RX_DAT_ACK 0x50
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#define LPC11U6X_I2C_MASTER_RX_DAT_NACK 0x58
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#define LPC11U6X_I2C_SLAVE_RX_ADR_ACK 0x60
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#define LPC11U6X_I2C_SLAVE_RX_ARB_LOST_ADR_ACK 0x68
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#define LPC11U6X_I2C_SLAVE_RX_GC_ACK 0x70
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#define LPC11U6X_I2C_SLAVE_RX_ARB_LOST_GC_ACK 0x78
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#define LPC11U6X_I2C_SLAVE_RX_DAT_ACK 0x80
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#define LPC11U6X_I2C_SLAVE_RX_DAT_NACK 0x88
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#define LPC11U6X_I2C_SLAVE_RX_GC_DAT_ACK 0x90
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#define LPC11U6X_I2C_SLAVE_RX_GC_DAT_NACK 0x98
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#define LPC11U6X_I2C_SLAVE_RX_STOP 0xA0
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#define LPC11U6X_I2C_SLAVE_TX_ADR_ACK 0xA8
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#define LPC11U6X_I2C_SLAVE_TX_ARB_LOST_ADR_ACK 0xB0
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#define LPC11U6X_I2C_SLAVE_TX_DAT_ACK 0xB8
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#define LPC11U6X_I2C_SLAVE_TX_DAT_NACK 0xC0
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#define LPC11U6X_I2C_SLAVE_TX_LAST_BYTE 0xC8
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/* Transfer Status */
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#define LPC11U6X_I2C_STATUS_BUSY 0x01
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#define LPC11U6X_I2C_STATUS_OK 0x02
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#define LPC11U6X_I2C_STATUS_FAIL 0x03
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#define LPC11U6X_I2C_STATUS_INACTIVE 0x04
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struct lpc11u6x_i2c_regs {
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volatile uint32_t con_set; /* Control set */
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volatile const uint32_t stat; /* Status */
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volatile uint32_t dat; /* Data */
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volatile uint32_t addr0; /* Slave address 0 */
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volatile uint32_t sclh; /* SCL Duty Cycle */
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volatile uint32_t scll; /* SCL Duty Cycle */
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volatile uint32_t con_clr; /* Control clear */
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volatile uint32_t mm_ctrl; /* Monitor mode control */
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volatile uint32_t addr[3]; /* Slave address {1,2,3} */
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volatile const uint32_t data_buffer; /* Data buffer */
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volatile uint32_t mask[4]; /* Slave address mask */
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};
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struct lpc11u6x_i2c_config {
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struct lpc11u6x_i2c_regs *base;
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char *clock_drv;
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char *scl_pinmux_drv;
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char *sda_pinmux_drv;
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void (*irq_config_func)(const struct device *dev);
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uint32_t clkid;
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uint32_t scl_flags;
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uint32_t sda_flags;
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uint8_t scl_pin;
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uint8_t sda_pin;
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};
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struct lpc11u6x_i2c_current_transfer {
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struct i2c_msg *msgs;
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uint8_t *curr_buf;
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uint8_t curr_len;
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uint8_t nr_msgs;
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uint8_t addr;
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uint8_t status;
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};
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struct lpc11u6x_i2c_data {
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struct lpc11u6x_i2c_current_transfer transfer;
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struct i2c_slave_config *slave;
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struct k_sem completion;
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struct k_mutex mutex;
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};
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#endif /* ZEPHYR_DRIVERS_I2C_I2C_LPC11U6X_H_ */
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