zephyr/arch/arc/soc/quark_se_c1000_ss/dts.fixup

21 lines
786 B
Plaintext

/* SoC level DTS fixup file */
#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED
#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL
#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0
#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED
#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL
#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
#define SRAM_SIZE CONFIG_SRAM_SIZE
#define FLASH_START CONFIG_FLASH_BASE_ADDRESS
#define FLASH_SIZE CONFIG_FLASH_SIZE
#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS
#define CONFIG_DCCM_SIZE ARC_DCCM_80000000_SIZE
/* End of SoC Level DTS fixup file */