21 lines
786 B
Plaintext
21 lines
786 B
Plaintext
/* SoC level DTS fixup file */
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#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED
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#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL
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#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0
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#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED
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#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL
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#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0
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#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
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#define SRAM_SIZE CONFIG_SRAM_SIZE
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#define FLASH_START CONFIG_FLASH_BASE_ADDRESS
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#define FLASH_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS
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#define CONFIG_DCCM_SIZE ARC_DCCM_80000000_SIZE
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/* End of SoC Level DTS fixup file */
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