88 lines
1.3 KiB
Plaintext
88 lines
1.3 KiB
Plaintext
# Copyright (c) 2020 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_INTEL_CAVS_V15
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config SOC_SERIES
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string
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default "cavs_v15"
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config SOC
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string
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default "intel_apl_adsp" if SOC_INTEL_CAVS_APL
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config SMP
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default y
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config MP_NUM_CPUS
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default 2
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config XTENSA_TIMER
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default n
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config CAVS_TIMER
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 400000000 if XTENSA_TIMER
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default 19200000 if CAVS_TIMER
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config SYS_CLOCK_TICKS_PER_SEC
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default 50000
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config IRQ_OFFLOAD_INTNUM
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default 0
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# This series does not have MISC0.
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# Since EXCSAVE7 is unused by Zephyr, use it instead.
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config XTENSA_KERNEL_CPU_PTR_SR
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default "EXCSAVE2"
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config KERNEL_ENTRY
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default "_MainEntry"
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config MULTI_LEVEL_INTERRUPTS
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default y
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config 2ND_LEVEL_INTERRUPTS
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default y
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config DYNAMIC_INTERRUPTS
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default y
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# To prevent test uses TEST_LOGGING_MINIMAL
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config TEST_LOGGING_DEFAULTS
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default n
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depends on TEST
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config IPM_CAVS_IDC
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default y
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config IPM
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default y
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if LOG
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config LOG_PRINTK
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default y
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config LOG_BACKEND_RB
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default y
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config LOG_BACKEND_RB_MEM_BASE
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default 0xBE000000
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config LOG_BACKEND_RB_MEM_SIZE
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default 8192
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endif # LOG
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if SMP
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config SCHED_IPI_SUPPORTED
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default y if IPM_CAVS_IDC
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endif # SMP
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endif # SOC_SERIES_INTEL_CAVS_V15
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