zephyr/drivers/timer
Filip Kokosinski 70c978bb97 soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue

The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.

The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.

The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-05-24 08:58:43 -07:00
..
CMakeLists.txt
Kconfig
Kconfig.altera_avalon
Kconfig.apic
Kconfig.arcv2
Kconfig.arm_arch
Kconfig.cavs
Kconfig.cc13x2_cc26x2_rtc
Kconfig.cortex_m_systick
Kconfig.esp32c3_sys
Kconfig.hpet
Kconfig.ite_it8xxx2
Kconfig.leon_gptimer
Kconfig.litex
Kconfig.mchp_xec_rtos
Kconfig.mcux_gpt
Kconfig.mcux_lptmr
Kconfig.mcux_os
Kconfig.mips_cp0
Kconfig.native_posix
Kconfig.npcx_itim
Kconfig.nrf_rtc
Kconfig.rcar_cmt
Kconfig.riscv_machine soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC 2022-05-24 08:58:43 -07:00
Kconfig.rv32m1_lptmr
Kconfig.sam0_rtc
Kconfig.stm32_lptim
Kconfig.xlnx_psttc
Kconfig.xtensa
altera_avalon_timer_hal.c
apic_timer.c
apic_tsc.c
arcv2_timer0.c
arm_arch_timer.c
cavs_timer.c
cc13x2_cc26x2_rtc_timer.c
cortex_m_systick.c
esp32c3_sys_timer.c
hpet.c
ite_it8xxx2_timer.c
leon_gptimer.c
litex_timer.c
mchp_xec_rtos_timer.c
mcux_gpt_timer.c
mcux_lptmr_timer.c
mcux_os_timer.c
mips_cp0_timer.c
native_posix_timer.c
npcx_itim_timer.c
nrf_rtc_timer.c
rcar_cmt_timer.c
riscv_machine_timer.c soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC 2022-05-24 08:58:43 -07:00
rv32m1_lptmr_timer.c
sam0_rtc_timer.c
stm32_lptim_timer.c
sys_clock_init.c
xlnx_psttc_timer.c
xlnx_psttc_timer_priv.h
xtensa_sys_timer.c