Added initial version of Devicetree for Infineon PSoC 6 SOC with following
structure:
1. MPN devicetree files
|--> psoc6
|--> mpns
|--> CY8C6016BZI_F04.dtsi
|--> CY8C6036BZI_F04.dtsi
|--> CY****.dtsi
Those file describes cpus, flash-controller, sram memory, nvic option. It
includes the package dtsi (e.g. psoc6_02.124-bga.dtsi) with information
about gpio (based on package e.g. 68-qfn, 128-tqfp, 124-bga, etc.) and
peripherals for (based on PSoC 6 series, psoc6_01, psoc6_02, etc).
MPN devicetree file is main platform dtsi file, which should be included
from board dts (e.g cy8cproto_062_4343w.dts), example:
#include <infineon/psoc6/mpns/CY8C624ABZI_S2D44.dtsi>
2. Devicetree files for PSoC 6 series 02 (2M).
Includes: psoc6_02.dtsi - peripherals dtsi psoc6_01.xxxxx.dtsi - package
dtsi. User does not directly include those files.
It automatically includes via MPN dtsi.
|--> psoc6_02
|--> psoc6_02.dtsi
|--> psoc6_02.100-wlcsp.dtsi
|--> psoc6_02.124-bga.dtsi
|--> psoc6_02.128-tqfp.dtsi
|--> psoc6_02.68-qfn.dtsi
In future PR/commits will be added Devicetree for support all
PSoC 6 series:
- for PSoC 6 series 01 (1M)
- for PSoC 6 series 03 (512)
- for PSoC 6 series 04 (256)
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
a5466cedee