zephyr/soc/xtensa
Sathish Kuttan 66d0898a21 soc: intel_s1000: add audio master clock config
Added a SOC level routine to configure master clock outputs
if CONFIG_AUDIO is defined.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-11 21:34:08 -05:00
..
D_108mini
D_212GP
D_233L
XRC_D2PM_5swIrq
XRC_FUSION_AON_ALL_LM
esp32 dts: xtensa: esp32: Add device tree support. 2019-01-29 09:47:17 -06:00
hifi2_std
hifi3_bd5
hifi3_bd5_call0
hifi4_bd7
hifi_mini
hifi_mini_4swIrq
intel_s1000 soc: intel_s1000: add audio master clock config 2019-02-11 21:34:08 -05:00
sample_controller dts: qemu_xtensa/xt-sim: Enable device tree support 2019-02-01 07:49:28 -06:00