72 lines
2.4 KiB
C
72 lines
2.4 KiB
C
/* Copyright(c) 2022 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/cache.h>
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/arch/cpu.h>
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#include <adsp_memory.h>
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#include <adsp_shim.h>
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#include <mem_window.h>
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#include <soc_util.h>
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/* host windows */
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#define DMWBA(win_base) (win_base + 0x0)
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#define DMWLO(win_base) (win_base + 0x4)
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#define DT_DRV_COMPAT intel_adsp_mem_window
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__imr int mem_win_init(const struct device *dev)
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{
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const struct mem_win_config *config = dev->config;
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if (config->initialize) {
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bbzero((void *)config->mem_base, config->size);
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}
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sys_write32(config->size | 0x7, DMWLO(config->base_addr));
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if (config->read_only) {
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sys_write32((config->mem_base | ADSP_DMWBA_READONLY | ADSP_DMWBA_ENABLE),
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DMWBA(config->base_addr));
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} else {
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sys_write32((config->mem_base | ADSP_DMWBA_ENABLE), DMWBA(config->base_addr));
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}
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return 0;
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}
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void mem_window_idle_exit(void)
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{
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mem_win_init(DEVICE_DT_GET(MEM_WINDOW_NODE(0)));
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mem_win_init(DEVICE_DT_GET(MEM_WINDOW_NODE(1)));
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mem_win_init(DEVICE_DT_GET(MEM_WINDOW_NODE(2)));
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mem_win_init(DEVICE_DT_GET(MEM_WINDOW_NODE(3)));
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}
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#define MEM_WINDOW_DEFINE(n) \
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static const struct mem_win_config mem_win_config_##n = { \
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.base_addr = DT_REG_ADDR(MEM_WINDOW_NODE(n)), \
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.size = WIN_SIZE(n), \
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.offset = WIN_OFFSET(n), \
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.read_only = DT_PROP(MEM_WINDOW_NODE(n), read_only), \
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.mem_base = DT_REG_ADDR(DT_PHANDLE(MEM_WINDOW_NODE(n), memory)) + WIN_OFFSET(n), \
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.initialize = DT_PROP(MEM_WINDOW_NODE(n), initialize), \
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}; \
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DEVICE_DT_DEFINE(MEM_WINDOW_NODE(n), mem_win_init, NULL, NULL, &mem_win_config_##n, EARLY, \
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, NULL);
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#if DT_NODE_HAS_STATUS(MEM_WINDOW_NODE(0), okay)
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MEM_WINDOW_DEFINE(0)
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#endif
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#if DT_NODE_HAS_STATUS(MEM_WINDOW_NODE(1), okay)
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MEM_WINDOW_DEFINE(1)
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#endif
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#if DT_NODE_HAS_STATUS(MEM_WINDOW_NODE(2), okay)
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MEM_WINDOW_DEFINE(2)
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#endif
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#if DT_NODE_HAS_STATUS(MEM_WINDOW_NODE(3), okay)
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MEM_WINDOW_DEFINE(3)
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#endif
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