zephyr/boards/xtensa/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi

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/*
* Copyright 2022 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO8>,
<SPIM2_SCLK_GPIO7>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO9>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO5>,
<I2C0_SCL_GPIO6>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
twai_default: twai_default {
group1 {
pinmux = <TWAI_TX_GPIO3>,
<TWAI_RX_GPIO4>;
};
};
};