67f3d0b923
What is the changed? CPU affinity test for SMP cores will now cover a change in ROM offset. How is it changed? Add a new testcase section with ROM offset set to something other than the default 0. Why is it change? There is no test to cover the issue reported in #76182 and the cpu affinity test is the closest to test the issue. Adding a new testcase will makes sure there is no breaking change in the future. Signed-off-by: Sudan Landge <sudan.landge@arm.com> |
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.. | ||
cache | ||
common | ||
condvar/condvar_api | ||
context | ||
device | ||
early_sleep | ||
events | ||
fatal | ||
fifo | ||
fpu_sharing | ||
gen_isr_table | ||
interrupt | ||
ipi_cascade | ||
ipi_optimize | ||
lifo | ||
mbox | ||
mem_heap/k_heap_api | ||
mem_protect | ||
mem_slab | ||
mp | ||
msgq | ||
mutex | ||
obj_core | ||
obj_tracking | ||
pending | ||
pipe | ||
poll | ||
profiling/profiling_api | ||
queue | ||
sched | ||
semaphore | ||
sleep | ||
smp | ||
smp_abort | ||
smp_boot_delay | ||
smp_suspend | ||
spinlock | ||
stack/stack | ||
threads | ||
tickless/tickless_concept | ||
timer | ||
usage/thread_runtime_stats | ||
workq | ||
xip |