142 lines
3.2 KiB
Plaintext
142 lines
3.2 KiB
Plaintext
/*
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* Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "litex,vexriscv", "litex-dev";
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model = "litex,vexriscv";
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chosen {
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zephyr,entropy = &prbs0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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clock-frequency = <100000000>;
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compatible = "spinalhdl,vexriscv", "riscv";
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device_type = "cpu";
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reg = <0>;
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riscv,isa = "rv32imac";
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status = "okay";
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timebase-frequency = <32768>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "litex,vexriscv";
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ranges;
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intc0: interrupt-controller@bc0 {
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#interrupt-cells = <2>;
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compatible = "vexriscv,intc0";
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interrupt-controller;
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reg = <0xbc0 0x4 0xfc0 0x4>;
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reg-names = "irq_mask", "irq_pending";
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riscv,max-priority = <7>;
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};
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uart0: serial@e0001800 {
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compatible = "litex,uart0";
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interrupt-parent = <&intc0>;
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interrupts = <2 10>;
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reg = <0xe0001800 0x18>;
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reg-names = "control";
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label = "uart0";
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status = "disabled";
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};
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spi0: spi@e0002000 {
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compatible = "litex,spi";
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interrupt-parent = <&intc0>;
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interrupts = <5 0>;
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reg = <0xe0002000 0x34>;
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reg-names = "control";
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label = "spi0";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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timer0: serial@e0002800 {
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compatible = "litex,timer0";
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interrupt-parent = <&intc0>;
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interrupts = <1 0>;
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reg = <0xe0002800 0x40>;
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reg-names = "control";
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label = "timer0";
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status = "disabled";
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};
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eth0: ethernet@e0009800 {
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compatible = "litex,eth0";
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interrupt-parent = <&intc0>;
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interrupts = <3 0>;
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reg = <0xe0009800 0x6b 0xb0000000 0x2000>;
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local-mac-address = [10 e2 d5 00 00 02];
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reg-names = "control", "buffers";
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label = "eth0";
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status = "disabled";
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};
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dna0: dna@e0003800 {
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compatible = "litex,dna0";
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/* DNA data is 57-bits long,
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so it requires 8 bytes.
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In LiteX each 32-bit register holds
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only a single byte of meaningful data,
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hence 8 registers. */
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reg = <0xe0003800 0x20>;
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reg-names = "mem";
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label = "dna0";
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status = "disabled";
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};
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i2c0: i2c@e0005000 {
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compatible = "litex,i2c";
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reg = <0xe0005000 0x4 0xe0005004 0x4>;
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reg-names = "write", "read";
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label = "i2c0";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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gpio_out: gpio@e0005800 {
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compatible = "litex,gpio";
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reg = <0xe0005800 0x4>;
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reg-names = "control";
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ngpios = <4>;
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label = "gpio_out";
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port-is-output;
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status = "disabled";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio_in: gpio@e0006000 {
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compatible = "litex,gpio";
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reg = <0xe0006000 0x4>;
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reg-names = "control";
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ngpios = <4>;
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label = "gpio_in";
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status = "disabled";
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gpio-controller;
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#gpio-cells = <2>;
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};
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prbs0: prbs@e0006800 {
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compatible = "litex,prbs";
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reg = <0xe0006800 0x4>;
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reg-names = "status";
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label = "prbs0";
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status = "disabled";
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};
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pwm0: pwm@e0007000 {
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compatible = "litex,pwm";
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reg = <0xe0007000 0x4 0xe0007004 0x10 0xe0007014 0x10>;
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reg-names = "enable", "width", "period";
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label = "pwm0";
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status = "disabled";
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#pwm-cells = <2>;
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};
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};
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};
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